ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
authorAlexander Varnin <fenixk19@mail.ru>
Tue, 20 Nov 2012 11:02:58 +0000 (20:02 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Tue, 20 Nov 2012 11:02:58 +0000 (20:02 +0900)
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.

Signed-off-by: Alexander Varnin <fenixk19@mail.ru>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s3c24xx/clock-s3c2443.c

index 7f689ce..bdaba59 100644 (file)
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
                .devname        = "s3c2410-spi.0",
                .parent         = &clk_p,
                .enable         = s3c2443_clkcon_enable_p,
-               .ctrlbit        = S3C2443_PCLKCON_SPI0,
-       }, {
-               .name           = "spi",
-               .devname        = "s3c2410-spi.1",
-               .parent         = &clk_p,
-               .enable         = s3c2443_clkcon_enable_p,
                .ctrlbit        = S3C2443_PCLKCON_SPI1,
        }
 };