pinctrl: sunxi: Fix H616 I2S3 pin data
authorAndre Przywara <andre.przywara@arm.com>
Wed, 5 Jan 2022 17:29:52 +0000 (17:29 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 8 Feb 2022 17:34:11 +0000 (18:34 +0100)
commit 1fd6bb5b47a65eacb063b37e6fa6df2b8fa92959 upstream.

Two bugs have sneaked in the H616 pinctrl data:
- PH9 uses the mux value of 0x3 twice (one should be 0x5 instead)
- PH8 and PH9 use the "i2s3" function name twice in each pin

For the double pin name we use the same trick we pulled for i2s0: append
the pin function to the group name to designate the special function.

Fixes: 25adc29407fb ("pinctrl: sunxi: Add support for the Allwinner H616 pin controller")
Reported-by: SASANO Takayoshi <uaa@mx5.nisiq.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220105172952.23347-1-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

index ce1917e..152b712 100644 (file)
@@ -363,16 +363,16 @@ static const struct sunxi_desc_pin h616_pins[] = {
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* CTS */
-                 SUNXI_FUNCTION(0x3, "i2s3"),  /* DO0 */
+                 SUNXI_FUNCTION(0x3, "i2s3_dout0"),    /* DO0 */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* MISO */
-                 SUNXI_FUNCTION(0x5, "i2s3"),  /* DI1 */
+                 SUNXI_FUNCTION(0x5, "i2s3_din1"),     /* DI1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 8)),  /* PH_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x3, "i2s3"),  /* DI0 */
+                 SUNXI_FUNCTION(0x3, "i2s3_din0"),     /* DI0 */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* CS1 */
-                 SUNXI_FUNCTION(0x3, "i2s3"),  /* DO1 */
+                 SUNXI_FUNCTION(0x5, "i2s3_dout1"),    /* DO1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 9)),  /* PH_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),