[SystemZ] Bugfix in storeLoadCanUseBlockBinary().

Check that the MemoryVT of LoadA matches that of LoadB.

This fixes https://bugs.llvm.org/show_bug.cgi?id=46239.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D81671

diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 3927a97..3732868 100644 (file)
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -1456,7 +1456,8 @@ bool SystemZDAGToDAGISel::storeLoadCanUseBlockBinary(SDNode *N,
   auto *StoreA = cast<StoreSDNode>(N);
   auto *LoadA = cast<LoadSDNode>(StoreA->getValue().getOperand(1 - I));
   auto *LoadB = cast<LoadSDNode>(StoreA->getValue().getOperand(I));
-  return !LoadA->isVolatile() && canUseBlockOperation(StoreA, LoadB);
+  return !LoadA->isVolatile() && LoadA->getMemoryVT() == LoadB->getMemoryVT() &&
+         canUseBlockOperation(StoreA, LoadB);
 }
 
 void SystemZDAGToDAGISel::Select(SDNode *Node) {

diff --git a/llvm/test/CodeGen/SystemZ/and-08.ll b/llvm/test/CodeGen/SystemZ/and-08.ll
index cce8cb6..ad5351f 100644 (file)
--- a/llvm/test/CodeGen/SystemZ/and-08.ll
+++ b/llvm/test/CodeGen/SystemZ/and-08.ll
@@ -371,6 +371,21 @@ define void @f26(i64 *%ptr1, i64 *%ptr2) {
   ret void
 }
 
+; Test a case where one of the loads are optimized by the DAGCombiner to a
+; zero-extending load of half the original size.
+define void @f27(i16* noalias %ptr1, i16* noalias %ptr2) {
+; CHECK-LABEL: f27:
+; CHECK-NOT: nc
+; CHECK: br %r14
+entry:
+  %0 = load i16, i16 *%ptr1, align 2
+  %1 = lshr i16 %0, 8
+  %2 = load i16, i16 *%ptr2, align 2
+  %and7 = and i16 %1, %2
+  store i16 %and7, i16 *%ptr1, align 2
+  ret void
+}
+
 !0 = !{ !"root" }
 !1 = !{ !"set1", !0 }
 !2 = !{ !"set2", !0 }