* v850-opc.c (v850_operands): Define EP operand.

        (IF4A, IF4B, IF4C, IF4D): Use EP.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 42d1243..a57a418 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,9 @@
 start-sanitize-v850
 Fri Aug 23 00:27:01 1996  Jeffrey A Law  (law@cygnus.com)
 
+       * v850-opc.c (v850_operands): Define EP operand.
+       (IF4A, IF4B, IF4C, IF4D): Use EP.
+
        * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
        with immediate operand, "movhi".  Tweak "ldsr".
 

diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index faa20a3..d28dfed 100644 (file)
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -74,7 +74,11 @@ const struct v850_operand v850_operands[] = {
 
 /* System register operands.  */
 #define SR1    (D8+1)
-  { 5, 0, 0, 0, V850_OPERAND_SRG }
+  { 5, 0, 0, 0, V850_OPERAND_SRG },
+
+/* EP Register.  */
+#define EP     (SR1+1)
+  { 0, 0, 0, 0, V850_OPERAND_EP }
 } ; 
 
 \f
@@ -88,10 +92,10 @@ const struct v850_operand v850_operands[] = {
 #define IF3    {D9}
 
 /* 16-bit load/store instruction (Format IV) */
-#define IF4A   {D7S, R1, R2}
-#define IF4B   {R2, D7S, R1}
-#define IF4C   {D8, R1, R2}
-#define IF4D   {R2, D8, R1}
+#define IF4A   {D7S, EP, R2}
+#define IF4B   {R2, D7S, EP}
+#define IF4C   {D8, EP, R2}
+#define IF4D   {R2, D8, EP}
 
 /* Jump instruction (Format V) */
 #define IF5    {D22}