soc/tegra: pmc: Update Tegra234 reset sources
authorSandipan Patra <spatra@nvidia.com>
Fri, 1 Apr 2022 14:33:43 +0000 (20:03 +0530)
committerThierry Reding <treding@nvidia.com>
Wed, 6 Apr 2022 13:03:23 +0000 (15:03 +0200)
Update the tegra234_reset_sources array to contain all reset sources for
Tegra234 and NULL out the entries that do not actually exist.

Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/pmc.c

index fdf508e..c01db53 100644 (file)
@@ -3766,7 +3766,7 @@ static const struct tegra_pmc_regs tegra234_pmc_regs = {
 };
 
 static const char * const tegra234_reset_sources[] = {
-       "SYS_RESET_N",
+       "SYS_RESET_N",  /* 0x0 */
        "AOWDT",
        "BCCPLEXWDT",
        "BPMPWDT",
@@ -3774,19 +3774,36 @@ static const char * const tegra234_reset_sources[] = {
        "SPEWDT",
        "APEWDT",
        "LCCPLEXWDT",
-       "SENSOR",
-       "AOTAG",
-       "VFSENSOR",
+       "SENSOR",       /* 0x8 */
+       NULL,
+       NULL,
        "MAINSWRST",
        "SC7",
        "HSM",
-       "CSITE",
+       NULL,
        "RCEWDT",
-       "PVA0WDT",
-       "PVA1WDT",
-       "L1A_ASYNC",
+       NULL,           /* 0x10 */
+       NULL,
+       NULL,
        "BPMPBOOT",
        "FUSECRC",
+       "DCEWDT",
+       "PSCWDT",
+       "PSC",
+       "CSITE_SW",     /* 0x18 */
+       "POD",
+       "SCPM",
+       "VREFRO_POWERBAD",
+       "VMON",
+       "FMON",
+       "FSI_R5WDT",
+       "FSI_THERM",
+       "FSI_R52C0WDT", /* 0x20 */
+       "FSI_R52C1WDT",
+       "FSI_R52C2WDT",
+       "FSI_R52C3WDT",
+       "FSI_FMON",
+       "FSI_VMON",     /* 0x25 */
 };
 
 static const struct tegra_wake_event tegra234_wake_events[] = {