[ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPoison when V is in an unreach...
authorJuneyoung Lee <aqjune@gmail.com>
Tue, 12 May 2020 15:37:38 +0000 (00:37 +0900)
committerJuneyoung Lee <aqjune@gmail.com>
Wed, 13 May 2020 01:16:47 +0000 (10:16 +0900)
Summary:
This fixes PR45885 by fixing isGuaranteedNotToBeUndefOrPoison so it does not look into dominating
branch conditions of V when V is an instruction in an unreachable block.

Reviewers: spatel, nikic, lebedev.ri

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79790

llvm/lib/Analysis/ValueTracking.cpp
llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll [new file with mode: 0644]

index 691e452..a4b0202 100644 (file)
@@ -4821,12 +4821,17 @@ bool llvm::isGuaranteedNotToBeUndefOrPoison(const Value *V,
   if (!CtxI || !CtxI->getParent() || !DT)
     return false;
 
+  auto *DNode = DT->getNode(CtxI->getParent());
+  if (!DNode)
+    // Unreachable block
+    return false;
+
   // If V is used as a branch condition before reaching CtxI, V cannot be
   // undef or poison.
   //   br V, BB1, BB2
   // BB1:
   //   CtxI ; V cannot be undef or poison here
-  auto Dominator = DT->getNode(CtxI->getParent())->getIDom();
+  auto *Dominator = DNode->getIDom();
   while (Dominator) {
     auto *TI = Dominator->getBlock()->getTerminator();
 
diff --git a/llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll b/llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll
new file mode 100644 (file)
index 0000000..666c4b4
--- /dev/null
@@ -0,0 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -div-rem-pairs -S -mtriple=powerpc64-unknown-unknown | FileCheck %s
+
+define void @g() {
+; CHECK-LABEL: @g(
+; CHECK-NEXT:  if.end:
+; CHECK-NEXT:    ret void
+; CHECK:       for.cond:
+; CHECK-NEXT:    [[TMP0:%.*]] = mul i16 [[DIV_I:%.*]], [[REM_FROZEN:%.*]]
+; CHECK-NEXT:    [[REM_DECOMPOSED:%.*]] = sub i16 1, [[TMP0]]
+; CHECK-NEXT:    [[REM_FROZEN]] = freeze i16 [[REM_DECOMPOSED]]
+; CHECK-NEXT:    [[DIV_I]] = sdiv i16 1, [[REM_FROZEN]]
+; CHECK-NEXT:    br label [[FOR_COND:%.*]]
+;
+if.end:
+  ret void
+
+for.cond:                                         ; preds = %for.cond
+  %rem = srem i16 1, %rem
+  %div.i = sdiv i16 1, %rem
+  br label %for.cond
+}
+
+