ARM: dts: exynos: set g3d parent clock to dpll
authorInki Dae <inki.dae@samsung.com>
Fri, 23 Nov 2018 01:37:11 +0000 (10:37 +0900)
committerJunghoon Kim <jhoon20.kim@samsung.com>
Thu, 14 Feb 2019 05:57:38 +0000 (14:57 +0900)
 MALI GPU device uses VPLL as its parent clock which generates
 400MHz clock so it's not enough for MALI GPU device.
 This patch changes g3d parent clock to dpll which generates
 600MHz.

Change-Id: I42f0a8c13ec8eec8e91f73ba210e3c0cbcb596d0
Signed-off-by: Inki Dae <inki.dae@samsung.com>
arch/arm/boot/dts/exynos5422-odroid-core.dtsi

index 6ebd184ce5e3377bf262a1ddbcfe041e019b32e1..704594fad33bff4839ced9e1d0ff0376e29f8354 100644 (file)
 
 &mali {
        mali-supply = <&buck4_reg>;
+       assigned-clocks = <&clock CLK_MOUT_ACLK_G3D>;
+       assigned-clock-parents = <&clock CLK_MOUT_DPLL>;
        status = "okay";
 };