drm/amdgpu/vcn: use dummy register selects AID for VCN_RAM ucode
authorJames Zhu <James.Zhu@amd.com>
Wed, 15 Mar 2023 07:54:55 +0000 (03:54 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:56:10 +0000 (09:56 -0400)
Use dummy register 0xDEADBEEF selects AID for PSP VCN_RAM ucode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

index 49b07843efd14cc9a1c4b8b25970757fbf709b9c..759f64a4acf4645b8cdf124c16f60b15667e0261 100644 (file)
@@ -681,9 +681,15 @@ static int vcn_v4_0_3_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, b
        tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK;
        WREG32_SOC15(VCN, vcn_inst, regUVD_POWER_STATUS, tmp);
 
-       if (indirect)
+       if (indirect) {
+               DRM_DEV_DEBUG(adev->dev, "VCN %d start: on AID %d",
+                       inst_idx, adev->vcn.inst[inst_idx].aid_id);
                adev->vcn.inst[inst_idx].dpg_sram_curr_addr =
                                (uint32_t *)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr;
+               /* Use dummy register 0xDEADBEEF passing AID selection to PSP FW */
+               WREG32_SOC15_DPG_MODE(inst_idx, 0xDEADBEEF,
+                       adev->vcn.inst[inst_idx].aid_id, 0, true);
+       }
 
        /* enable clock gating */
        vcn_v4_0_3_disable_clock_gating_dpg_mode(adev, 0, inst_idx, indirect);