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pinctrl: aspeed-g5: Fix GPIOE1 typo
author
Andrew Jeffery
<andrew@aj.id.au>
Tue, 27 Sep 2016 14:50:15 +0000
(
00:20
+0930)
committer
Linus Walleij
<linus.walleij@linaro.org>
Tue, 18 Oct 2016 12:36:11 +0000
(14:36 +0200)
This prevented C20 from successfully being muxed as GPIO.
Fixes:
56e57cb6c07f
(pinctrl: Add pinctrl-aspeed-g5 driver)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
patch
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diff --git
a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index
1463983
..
235d929
100644
(file)
--- a/
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@
-182,7
+182,7
@@
SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC);
SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC);
SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE);
-MS_PIN_DECL(C20, GPI
E0
, NDCD3, GPIE0OUT);
+MS_PIN_DECL(C20, GPI
OE1
, NDCD3, GPIE0OUT);
FUNC_GROUP_DECL(GPIE0, B20, C20);