info->vram_vis_size = vram_vis.heap_size;
}
+ /* Add some margin of error, though this shouldn't be needed in theory. */
+ info->all_vram_visible = info->vram_size * 0.9 < info->vram_vis_size;
+
/* Set chip identification. */
info->pci_id = amdinfo->asic_id; /* TODO: is this correct? */
info->pci_rev_id = amdinfo->pci_rev_id;
fprintf(f, " min_alloc_size = %u\n", info->min_alloc_size);
fprintf(f, " address32_hi = %u\n", info->address32_hi);
fprintf(f, " has_dedicated_vram = %u\n", info->has_dedicated_vram);
+ fprintf(f, " all_vram_visible = %u\n", info->all_vram_visible);
fprintf(f, " num_sdp_interfaces = %u\n", info->num_sdp_interfaces);
fprintf(f, " num_tcc_blocks = %i\n", info->num_tcc_blocks);
fprintf(f, " tcc_cache_line_size = %u\n", info->tcc_cache_line_size);