With the block's end_ip accidentally being the ip of the next instruction,
contrary to the comment, you would end up doing end-of-block freeing early
and have the value missing when it came time to emit the next instruction.
Just expand the ips to have separate ones for start and end of block --
while it means that nir_instr->index is no longer incremented by 1 per
instruction, it makes sense for use in liveness because a backend is
likely to need to do other things at block boundaries (like emit the if
statement's code), and having an ip to identify that stuff is useful.
Fixes:
a206b581578d ("nir: Add a block start/end ip to live instr index metadata.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7658>
unsigned index = 0;
nir_foreach_block(block, impl) {
- block->start_ip = index;
+ block->start_ip = index++;
nir_foreach_instr(instr, block)
instr->index = index++;
- block->end_ip = index;
+ block->end_ip = index++;
}
return index;
uint32_t dom_pre_index, dom_post_index;
/**
- * nir_instr->index for the first nir_instr in the block. If the block is
- * empty, it will be the index of the immediately previous instr, or 0.
- * Valid when the impl has nir_metadata_instr_index.
+ * Value just before the first nir_instr->index in the block, but after
+ * end_ip that of any predecessor block.
*/
uint32_t start_ip;
/**
- * nir_instr->index for the last nir_instr in the block. If the block is
- * empty, it will be the same as start_ip. Valid when the impl has
- * nir_metadata_instr_index.
+ * Value just after the last nir_instr->index in the block, but before the
+ * start_ip of any successor block.
*/
uint32_t end_ip;
for (int i = 0; i < impl->ssa_alloc; i++)
liveness->defs->start = ~0;
- unsigned last_instr = 0;
nir_foreach_block(block, impl) {
unsigned index;
BITSET_FOREACH_SET(index, block->live_in, impl->ssa_alloc) {
liveness->defs[index].start = MIN2(liveness->defs[index].start,
- last_instr);
+ block->start_ip);
}
nir_foreach_instr(instr, block) {
nir_foreach_ssa_def(instr, def_cb, liveness);
-
- last_instr = instr->index;
};
/* track an if src's use. We need to make sure that our value is live
* across the if reference, where we don't have an instr->index
- * representing the use. Mark it as live through the next real
- * instruction.
+ * representing the use. Mark it as live through the end of the block.
*/
nir_if *nif = nir_block_get_following_if(block);
if (nif) {
if (nif->condition.is_ssa) {
liveness->defs[nif->condition.ssa->index].end = MAX2(
- liveness->defs[nif->condition.ssa->index].end,
- last_instr + 1);
+ liveness->defs[nif->condition.ssa->index].end, block->end_ip);
}
}
BITSET_FOREACH_SET(index, block->live_out, impl->ssa_alloc) {
- liveness->defs[index].end = MAX2(liveness->defs[index].end, last_instr);
+ liveness->defs[index].end = MAX2(liveness->defs[index].end,
+ block->end_ip);
}
}
unsigned loop_label;
+ /* if condition set up at the end of a block, for ntt_emit_if(). */
+ struct ureg_src if_cond;
+
/* TGSI temps for our NIR SSA and register values. */
struct ureg_dst *reg_temp;
struct ureg_dst *ssa_temp;
ntt_emit_if(struct ntt_compile *c, nir_if *if_stmt)
{
unsigned label;
- ureg_UIF(c->ureg, ntt_get_src(c, if_stmt->condition), &label);
+ ureg_UIF(c->ureg, c->if_cond, &label);
ntt_emit_cf_list(c, &if_stmt->then_list);
if (!exec_list_is_empty(&if_stmt->else_list)) {
nir_foreach_src(instr, ntt_src_live_interval_end_cb, c);
}
+ /* Set up the if condition for ntt_emit_if(), which we have to do before
+ * freeing up the temps (the "if" is treated as inside the block for liveness
+ * purposes, despite not being an instruction)
+ */
+ nir_if *nif = nir_block_get_following_if(block);
+ if (nif)
+ c->if_cond = ntt_get_src(c, nif->condition);
+
+ /* Free up any SSA temps that are unused at the end of the block. */
unsigned index;
BITSET_FOREACH_SET(index, block->live_out, BITSET_WORDS(c->impl->ssa_alloc)) {
unsigned def_end_ip = c->liveness->defs[index].end;