eeprom: at25: allow page sizes greater than 16 bit

Storage technologies like FRAM have no "write pages", the whole chip can
be written within one SPI transfer. For these chips, the page size can
be set equal to the device size. Currently available devices are already
bigger than 64 kiB.

Signed-off-by: Christian Eggers <ceggers@arri.de>
Link: https://lore.kernel.org/r/20200727111218.26926-1-ceggers@arri.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index cde9a2f..0e7c8dc 100644 (file)
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -261,7 +261,7 @@ static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip)
 
        if (device_property_read_u32(dev, "pagesize", &val) == 0 ||
            device_property_read_u32(dev, "at25,page-size", &val) == 0) {
-               chip->page_size = (u16)val;
+               chip->page_size = val;
        } else {
                dev_err(dev, "Error: missing \"pagesize\" property\n");
                return -ENODEV;

diff --git a/include/linux/spi/eeprom.h b/include/linux/spi/eeprom.h
index aceccf9..1cca3dd 100644 (file)
--- a/include/linux/spi/eeprom.h
+++ b/include/linux/spi/eeprom.h
@@ -14,7 +14,7 @@
 struct spi_eeprom {
        u32             byte_len;
        char            name[10];
-       u16             page_size;              /* for writes */
+       u32             page_size;              /* for writes */
        u16             flags;
 #define        EE_ADDR1        0x0001                  /*  8 bit addrs */
 #define        EE_ADDR2        0x0002                  /* 16 bit addrs */