mmc: dw_mmc: fix misleading comment in dw_mci_rk3288_set_ios

DDR52 with 8-bit mode should be handled in a different way when
requesting ciu_clk. However DDR50 is used for SDMMC/SDIO and
could never be possible with 8-bit mode. It's trival but misleading.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 40d7de2..8c86a80 100644 (file)
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -44,9 +44,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
         * bus_hz = cclkin / RK3288_CLKGEN_DIV
         * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div))
         *
-        * Note: div can only be 0 or 1
-        *       if DDR50 8bit mode(only emmc work in 8bit mode),
-        *       div must be set 1
+        * Note: div can only be 0 or 1, but div must be set to 1 for eMMC
+        * DDR52 8-bit mode.
         */
        if (ios->bus_width == MMC_BUS_WIDTH_8 &&
            ios->timing == MMC_TIMING_MMC_DDR52)