Only one of the callers of intel_miptree_render_aux_usage actually took
brw->draw_aux_buffer_disabled into account. This was causing us to
ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render.
This isn't a problem because the draw_aux_buffer_disabled entry was set
during texture preparation and we already did the resolve at that time.
However, this also meant that the aux_usage we were passing to
brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our
automatic cache flushing around aux_usage changes wasn't happening.
This was causing GPU hangs in Oxenfree.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383
Fixes:
ea0d2e98ecb369ab84e78c84709c0930ea8c293a
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
enum isl_format dst_isl_format =
brw_blorp_to_isl_format(brw, dst_format, true);
enum isl_aux_usage dst_aux_usage =
- intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format, false);
+ intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format,
+ false, false);
const bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1,
dst_aux_usage, dst_clear_supported);
irb->mt, irb->mt_level, irb->mt_layer, num_layers);
enum isl_aux_usage aux_usage =
- intel_miptree_render_aux_usage(brw, irb->mt, isl_format, false);
+ intel_miptree_render_aux_usage(brw, irb->mt, isl_format,
+ false, false);
intel_miptree_prepare_render(brw, irb->mt, level, irb->mt_layer,
num_layers, aux_usage);
bool blend_enabled = ctx->Color.BlendEnabled & (1 << i);
enum isl_aux_usage aux_usage =
intel_miptree_render_aux_usage(brw, irb->mt, isl_format,
- blend_enabled);
+ blend_enabled,
+ brw->draw_aux_buffer_disabled[i]);
intel_miptree_prepare_render(brw, irb->mt, irb->mt_level,
irb->mt_layer, irb->layer_count,
bool blend_enabled = ctx->Color.BlendEnabled & (1 << i);
enum isl_aux_usage aux_usage =
intel_miptree_render_aux_usage(brw, irb->mt, isl_format,
- blend_enabled);
+ blend_enabled,
+ brw->draw_aux_buffer_disabled[i]);
brw_render_cache_add_bo(brw, irb->mt->bo, isl_format, aux_usage);
enum isl_format isl_format = brw->mesa_to_isl_render_format[rb_format];
enum isl_aux_usage aux_usage =
- brw->draw_aux_buffer_disabled[unit] ? ISL_AUX_USAGE_NONE :
intel_miptree_render_aux_usage(brw, mt, isl_format,
- ctx->Color.BlendEnabled & (1 << unit));
+ ctx->Color.BlendEnabled & (1 << unit),
+ brw->draw_aux_buffer_disabled[unit]);
struct isl_view view = {
.format = isl_format,
intel_miptree_render_aux_usage(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format render_format,
- bool blend_enabled)
+ bool blend_enabled,
+ bool draw_aux_disabled)
{
struct gen_device_info *devinfo = &brw->screen->devinfo;
+ if (draw_aux_disabled)
+ return ISL_AUX_USAGE_NONE;
+
switch (mt->aux_usage) {
case ISL_AUX_USAGE_MCS:
assert(mt->mcs_buf);
intel_miptree_render_aux_usage(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format render_format,
- bool blend_enabled);
+ bool blend_enabled,
+ bool draw_aux_disabled);
void
intel_miptree_prepare_render(struct brw_context *brw,
struct intel_mipmap_tree *mt, uint32_t level,