drm amdgpu: SI UVD enable for Oland
authorSonny Jiang <sonny.jiang@amd.com>
Wed, 10 Jun 2020 20:22:59 +0000 (16:22 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:24 +0000 (01:59 -0400)
Enable Oland UVD block.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si.c

index 0f1c6c1..5bd0ebf 100644 (file)
@@ -41,6 +41,7 @@
 #include "si_dma.h"
 #include "dce_v6_0.h"
 #include "si.h"
+#include "uvd_v3_1.h"
 #include "dce_virtual.h"
 #include "gca/gfx_6_0_d.h"
 #include "oss/oss_1_0_d.h"
@@ -2210,8 +2211,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
                        amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
                else
                        amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block);
-
-               /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
+               amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
                /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
                break;
        case CHIP_HAINAN: