phy: qcom-qmp-usb: replace FLL layout writes for msm8996

Other PHYs tables directly reference FLL registers without using
reglayout. Define corresponding registers to be used by msm8996 PHY
tables and use them directly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index df1e99c..150b58b 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -122,11 +122,6 @@ enum qphy_reg_layout {
        QPHY_COM_PCS_READY_STATUS,
        /* PCS registers */
        QPHY_PLL_LOCK_CHK_DLY_TIME,
-       QPHY_FLL_CNTRL1,
-       QPHY_FLL_CNTRL2,
-       QPHY_FLL_CNT_VAL_L,
-       QPHY_FLL_CNT_VAL_H_TOL,
-       QPHY_FLL_MAN_CODE,
        QPHY_SW_RESET,
        QPHY_START_CTRL,
        QPHY_PCS_READY_STATUS,

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
index 4b6ddc7..4517f05 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
@@ -122,11 +122,6 @@ enum qphy_reg_layout {
        QPHY_COM_PCS_READY_STATUS,
        /* PCS registers */
        QPHY_PLL_LOCK_CHK_DLY_TIME,
-       QPHY_FLL_CNTRL1,
-       QPHY_FLL_CNTRL2,
-       QPHY_FLL_CNT_VAL_L,
-       QPHY_FLL_CNT_VAL_H_TOL,
-       QPHY_FLL_MAN_CODE,
        QPHY_SW_RESET,
        QPHY_START_CTRL,
        QPHY_PCS_READY_STATUS,
@@ -147,11 +142,6 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_START_CONTROL]        = 0x408,
        [QPHY_COM_PCS_READY_STATUS]     = 0x448,
        [QPHY_PLL_LOCK_CHK_DLY_TIME]    = 0xa8,
-       [QPHY_FLL_CNTRL1]               = 0xc4,
-       [QPHY_FLL_CNTRL2]               = 0xc8,
-       [QPHY_FLL_CNT_VAL_L]            = 0xcc,
-       [QPHY_FLL_CNT_VAL_H_TOL]        = 0xd0,
-       [QPHY_FLL_MAN_CODE]             = 0xd4,
        [QPHY_SW_RESET]                 = 0x00,
        [QPHY_START_CTRL]               = 0x08,
        [QPHY_PCS_STATUS]               = 0x174,

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index fb41c90..59ba40c 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -122,11 +122,6 @@ enum qphy_reg_layout {
        QPHY_COM_PCS_READY_STATUS,
        /* PCS registers */
        QPHY_PLL_LOCK_CHK_DLY_TIME,
-       QPHY_FLL_CNTRL1,
-       QPHY_FLL_CNTRL2,
-       QPHY_FLL_CNT_VAL_L,
-       QPHY_FLL_CNT_VAL_H_TOL,
-       QPHY_FLL_MAN_CODE,
        QPHY_SW_RESET,
        QPHY_START_CTRL,
        QPHY_PCS_READY_STATUS,
@@ -154,11 +149,6 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_START_CONTROL]        = 0x408,
        [QPHY_COM_PCS_READY_STATUS]     = 0x448,
        [QPHY_PLL_LOCK_CHK_DLY_TIME]    = 0xa8,
-       [QPHY_FLL_CNTRL1]               = 0xc4,
-       [QPHY_FLL_CNTRL2]               = 0xc8,
-       [QPHY_FLL_CNT_VAL_L]            = 0xcc,
-       [QPHY_FLL_CNT_VAL_H_TOL]        = 0xd0,
-       [QPHY_FLL_MAN_CODE]             = 0xd4,
        [QPHY_SW_RESET]                 = 0x00,
        [QPHY_START_CTRL]               = 0x08,
        [QPHY_PCS_STATUS]               = 0x174,

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
index 3fc3c05..9593277 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
@@ -24,6 +24,13 @@
 #define QPHY_V2_PCS_LOCK_DETECT_CONFIG3                        0x088
 #define QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK                0x0a0
 #define QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK          0x0a4
+#define QPHY_V2_PCS_FLL_CNTRL1                         0x0c0
+#define QPHY_V2_PCS_FLL_CNTRL2                         0x0c4
+#define QPHY_V2_PCS_FLL_CNT_VAL_L                      0x0c8
+#define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL                  0x0cc
+#define QPHY_V2_PCS_FLL_MAN_CODE                       0x0d0
+
+/* UFS only ? */
 #define QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP     0x0cc
 #define QPHY_V2_PCS_RX_SYM_RESYNC_CTRL                 0x13c
 #define QPHY_V2_PCS_RX_MIN_HIBERN8_TIME                        0x140

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 701b03a..7ab129c 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -122,11 +122,6 @@ enum qphy_reg_layout {
        QPHY_COM_PCS_READY_STATUS,
        /* PCS registers */
        QPHY_PLL_LOCK_CHK_DLY_TIME,
-       QPHY_FLL_CNTRL1,
-       QPHY_FLL_CNTRL2,
-       QPHY_FLL_CNT_VAL_L,
-       QPHY_FLL_CNT_VAL_H_TOL,
-       QPHY_FLL_MAN_CODE,
        QPHY_SW_RESET,
        QPHY_START_CTRL,
        QPHY_PCS_READY_STATUS,

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index aa7e193..ff1e10b 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -122,11 +122,6 @@ enum qphy_reg_layout {
        QPHY_COM_PCS_READY_STATUS,
        /* PCS registers */
        QPHY_PLL_LOCK_CHK_DLY_TIME,
-       QPHY_FLL_CNTRL1,
-       QPHY_FLL_CNTRL2,
-       QPHY_FLL_CNT_VAL_L,
-       QPHY_FLL_CNT_VAL_H_TOL,
-       QPHY_FLL_MAN_CODE,
        QPHY_SW_RESET,
        QPHY_START_CTRL,
        QPHY_PCS_READY_STATUS,
@@ -142,11 +137,6 @@ enum qphy_reg_layout {
 };
 
 static const unsigned int usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
-       [QPHY_FLL_CNTRL1]               = 0xc0,
-       [QPHY_FLL_CNTRL2]               = 0xc4,
-       [QPHY_FLL_CNT_VAL_L]            = 0xc8,
-       [QPHY_FLL_CNT_VAL_H_TOL]        = 0xcc,
-       [QPHY_FLL_MAN_CODE]             = 0xd0,
        [QPHY_SW_RESET]                 = 0x00,
        [QPHY_START_CTRL]               = 0x08,
        [QPHY_PCS_STATUS]               = 0x17c,
@@ -318,11 +308,11 @@ static const struct qmp_phy_init_tbl msm8996_usb3_rx_tbl[] = {
 
 static const struct qmp_phy_init_tbl msm8996_usb3_pcs_tbl[] = {
        /* FLL settings */
-       QMP_PHY_INIT_CFG_L(QPHY_FLL_CNTRL2, 0x03),
-       QMP_PHY_INIT_CFG_L(QPHY_FLL_CNTRL1, 0x02),
-       QMP_PHY_INIT_CFG_L(QPHY_FLL_CNT_VAL_L, 0x09),
-       QMP_PHY_INIT_CFG_L(QPHY_FLL_CNT_VAL_H_TOL, 0x42),
-       QMP_PHY_INIT_CFG_L(QPHY_FLL_MAN_CODE, 0x85),
+       QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNTRL2, 0x03),
+       QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNTRL1, 0x02),
+       QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNT_VAL_L, 0x09),
+       QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNT_VAL_H_TOL, 0x42),
+       QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_MAN_CODE, 0x85),
 
        /* Lock Det settings */
        QMP_PHY_INIT_CFG(QPHY_V2_PCS_LOCK_DETECT_CONFIG1, 0xd1),