Merge tag 'iommu-updates-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro...

Pull iommu updates from Joerg Roedel:
 "Core changes:
   - iova_magazine_alloc() optimization
   - Make flush-queue an IOMMU driver capability
   - Consolidate the error handling around device attachment

  AMD IOMMU changes:
   - AVIC Interrupt Remapping Improvements
   - Some minor fixes and cleanups

  Intel VT-d changes from Lu Baolu:
   - Small and misc cleanups

  ARM-SMMU changes from Will Deacon:
   - Device-tree binding updates:
      - Add missing clocks for SC8280XP and SA8775 Adreno SMMUs
      - Add two new Qualcomm SMMUs in SDX75 and SM6375
   - Workarounds for Arm MMU-700 errata:
      - 1076982: Avoid use of SEV-based cmdq wakeup
      - 2812531: Terminate command batches with a CMD_SYNC
      - Enforce single-stage translation to avoid nesting-related errata
   - Set the correct level hint for range TLB invalidation on teardown

  .. and some other minor fixes and cleanups (including Freescale PAMU
  and virtio-iommu changes)"

* tag 'iommu-updates-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (50 commits)
  iommu/vt-d: Remove commented-out code
  iommu/vt-d: Remove two WARN_ON in domain_context_mapping_one()
  iommu/vt-d: Handle the failure case of dmar_reenable_qi()
  iommu/vt-d: Remove unnecessary (void*) conversions
  iommu/amd: Remove extern from function prototypes
  iommu/amd: Use BIT/BIT_ULL macro to define bit fields
  iommu/amd: Fix DTE_IRQ_PHYS_ADDR_MASK macro
  iommu/amd: Fix compile error for unused function
  iommu/amd: Improving Interrupt Remapping Table Invalidation
  iommu/amd: Do not Invalidate IRT when IRTE caching is disabled
  iommu/amd: Introduce Disable IRTE Caching Support
  iommu/amd: Remove the unused struct amd_ir_data.ref
  iommu/amd: Switch amd_iommu_update_ga() to use modify_irte_ga()
  iommu/arm-smmu-v3: Set TTL invalidation hint better
  iommu/arm-smmu-v3: Document nesting-related errata
  iommu/arm-smmu-v3: Add explicit feature for nesting
  iommu/arm-smmu-v3: Document MMU-700 erratum 2812531
  iommu/arm-smmu-v3: Work around MMU-600 erratum 1076982
  dt-bindings: arm-smmu: Add SDX75 SMMU compatible
  dt-bindings: arm-smmu: Add SM6375 GPU SMMU
  ...

diff --cc Documentation/admin-guide/kernel-parameters.txt
Simple merge

diff --cc Documentation/arch/arm64/silicon-errata.rst
index d6430ad,0000000..f093a9d
mode 100644,000000..100644
--- 1/Documentation/arch/arm64/silicon-errata.rst
--- /dev/null
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@@ -1,220 -1,0 +1,224 @@@
 +=======================================
 +Silicon Errata and Software Workarounds
 +=======================================
 +
 +Author: Will Deacon <will.deacon@arm.com>
 +
 +Date  : 27 November 2015
 +
 +It is an unfortunate fact of life that hardware is often produced with
 +so-called "errata", which can cause it to deviate from the architecture
 +under specific circumstances.  For hardware produced by ARM, these
 +errata are broadly classified into the following categories:
 +
 +  ==========  ========================================================
 +  Category A  A critical error without a viable workaround.
 +  Category B  A significant or critical error with an acceptable
 +              workaround.
 +  Category C  A minor error that is not expected to occur under normal
 +              operation.
 +  ==========  ========================================================
 +
 +For more information, consult one of the "Software Developers Errata
 +Notice" documents available on infocenter.arm.com (registration
 +required).
 +
 +As far as Linux is concerned, Category B errata may require some special
 +treatment in the operating system. For example, avoiding a particular
 +sequence of code, or configuring the processor in a particular way. A
 +less common situation may require similar actions in order to declassify
 +a Category A erratum into a Category C erratum. These are collectively
 +known as "software workarounds" and are only required in the minority of
 +cases (e.g. those cases that both require a non-secure workaround *and*
 +can be triggered by Linux).
 +
 +For software workarounds that may adversely impact systems unaffected by
 +the erratum in question, a Kconfig entry is added under "Kernel
 +Features" -> "ARM errata workarounds via the alternatives framework".
 +These are enabled by default and patched in at runtime when an affected
 +CPU is detected. For less-intrusive workarounds, a Kconfig option is not
 +available and the code is structured (preferably with a comment) in such
 +a way that the erratum will not be hit.
 +
 +This approach can make it slightly onerous to determine exactly which
 +errata are worked around in an arbitrary kernel source tree, so this
 +file acts as a registry of software workarounds in the Linux Kernel and
 +will be updated when new workarounds are committed and backported to
 +stable kernels.
 +
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Implementor    | Component       | Erratum ID      | Kconfig                     |
 ++================+=================+=================+=============================+
 +| Allwinner      | A64/R18         | UNKNOWN1        | SUN50I_ERRATUM_UNKNOWN1     |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2457168        | ARM64_ERRATUM_2457168       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2064142        | ARM64_ERRATUM_2064142       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2038923        | ARM64_ERRATUM_2038923       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #1902691        | ARM64_ERRATUM_1902691       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #824069         | ARM64_ERRATUM_824069        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #819472         | ARM64_ERRATUM_819472        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #845719         | ARM64_ERRATUM_845719        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A53      | #843419         | ARM64_ERRATUM_843419        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A55      | #1530923        | ARM64_ERRATUM_1530923       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A55      | #2441007        | ARM64_ERRATUM_2441007       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A57      | #852523         | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A57      | #1319537        | ARM64_ERRATUM_1319367       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A57      | #1742098        | ARM64_ERRATUM_1742098       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A72      | #853709         | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A72      | #1319367        | ARM64_ERRATUM_1319367       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A72      | #1655431        | ARM64_ERRATUM_1742098       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A76      | #1188873,1418040| ARM64_ERRATUM_1418040       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A76      | #1165522        | ARM64_ERRATUM_1165522       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A76      | #1286807        | ARM64_ERRATUM_1286807       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A76      | #1463225        | ARM64_ERRATUM_1463225       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A77      | #1508412        | ARM64_ERRATUM_1508412       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2051678        | ARM64_ERRATUM_2051678       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2077057        | ARM64_ERRATUM_2077057       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2441009        | ARM64_ERRATUM_2441009       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A510     | #2658417        | ARM64_ERRATUM_2658417       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A710     | #2119858        | ARM64_ERRATUM_2119858       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A710     | #2054223        | ARM64_ERRATUM_2054223       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A710     | #2224489        | ARM64_ERRATUM_2224489       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-A715     | #2645198        | ARM64_ERRATUM_2645198       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-X2       | #2119858        | ARM64_ERRATUM_2119858       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Cortex-X2       | #2224489        | ARM64_ERRATUM_2224489       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N1     | #1188873,1418040| ARM64_ERRATUM_1418040       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N1     | #1349291        | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N1     | #1542419        | ARM64_ERRATUM_1542419       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N2     | #2139208        | ARM64_ERRATUM_2139208       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N2     | #2067961        | ARM64_ERRATUM_2067961       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | Neoverse-N2     | #2253138        | ARM64_ERRATUM_2253138       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | MMU-500         | #841119,826419  | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
++| ARM            | MMU-600         | #1076982,1209401| N/A                         |
+++----------------+-----------------+-----------------+-----------------------------+
++| ARM            | MMU-700         | #2268618,2812531| N/A                         |
+++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Broadcom       | Brahma-B53      | N/A             | ARM64_ERRATUM_845719        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Broadcom       | Brahma-B53      | N/A             | ARM64_ERRATUM_843419        |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX ITS    | #22375,24313    | CAVIUM_ERRATUM_22375        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX ITS    | #23144          | CAVIUM_ERRATUM_23144        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX GICv3  | #23154,38545    | CAVIUM_ERRATUM_23154        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX GICv3  | #38539          | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX Core   | #27456          | CAVIUM_ERRATUM_27456        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX Core   | #30115          | CAVIUM_ERRATUM_30115        |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX SMMUv2 | #27704          | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX2 SMMUv3| #74             | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX2 SMMUv3| #126            | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Cavium         | ThunderX2 Core  | #219            | CAVIUM_TX2_ERRATUM_219      |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Marvell        | ARM-MMU-500     | #582743         | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| NVIDIA         | Carmel Core     | N/A             | NVIDIA_CARMEL_CNP_ERRATUM   |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| NVIDIA         | T241 GICv3/4.x  | T241-FABRIC-4   | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Hisilicon      | Hip0{5,6,7}     | #161010101      | HISILICON_ERRATUM_161010101 |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Hisilicon      | Hip0{6,7}       | #161010701      | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Hisilicon      | Hip0{6,7}       | #161010803      | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Hisilicon      | Hip07           | #161600802      | HISILICON_ERRATUM_161600802 |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Hisilicon      | Hip08 SMMU PMCG | #162001800      | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo/Falkor v1  | E1003           | QCOM_FALKOR_ERRATUM_1003    |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo/Falkor v1  | E1009           | QCOM_FALKOR_ERRATUM_1009    |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | QDF2400 ITS     | E0065           | QCOM_QDF2400_ERRATUM_0065   |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Falkor v{1,2}   | E1041           | QCOM_FALKOR_ERRATUM_1041    |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo4xx Gold    | N/A             | ARM64_ERRATUM_1463225       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo4xx Gold    | N/A             | ARM64_ERRATUM_1418040       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo4xx Silver  | N/A             | ARM64_ERRATUM_1530923       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo4xx Silver  | N/A             | ARM64_ERRATUM_1024718       |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Qualcomm Tech. | Kryo4xx Gold    | N/A             | ARM64_ERRATUM_1286807       |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Rockchip       | RK3588          | #3588001        | ROCKCHIP_ERRATUM_3588001    |
 ++----------------+-----------------+-----------------+-----------------------------+
 +
 ++----------------+-----------------+-----------------+-----------------------------+
 +| Fujitsu        | A64FX           | E#010001        | FUJITSU_ERRATUM_010001      |
 ++----------------+-----------------+-----------------+-----------------------------+
 +
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ASR            | ASR8601         | #8601001        | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+

diff --cc drivers/iommu/amd/amd_iommu_types.h
Simple merge

diff --cc drivers/iommu/amd/iommu.c
index 9ea4096,dc48108..c3b58a8
--- 1/drivers/iommu/amd/iommu.c
--- 2/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@@ -3021,12 -3052,12 +3052,12 @@@ out
  }
  
  static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index,
-                         struct irte_ga *irte, struct amd_ir_data *data)
+                         struct irte_ga *irte)
  {
 -      bool ret;
        struct irq_remap_table *table;
 -      unsigned long flags;
        struct irte_ga *entry;
 +      unsigned long flags;
 +      u128 old;
  
        table = get_irq_table(iommu, devid);
        if (!table)
@@@ -3043,16 -3077,11 +3074,12 @@@
         * behind us, so the return value of cmpxchg16 should be the
         * same as the old value.
         */
 -      WARN_ON(!ret);
 +      old = entry->irte;
 +      WARN_ON(!try_cmpxchg128(&entry->irte, &old, irte->irte));
  
-       if (data)
-               data->ref = entry;
- 
        raw_spin_unlock_irqrestore(&table->lock, flags);
  
-       iommu_flush_irt(iommu, devid);
-       iommu_completion_wait(iommu);
+       iommu_flush_irt_and_complete(iommu, devid);
  
        return 0;
  }

diff --cc drivers/iommu/dma-iommu.c
Simple merge

diff --cc drivers/iommu/iommu.c
Simple merge