riscv/mm: hugepage's PG_dcache_clean flag is only set in head page

HugeTLB pages are always fully mapped, so only setting head page's
PG_dcache_clean flag is enough.

Signed-off-by: Tong Tiangen <tongtiangen@huawei.com>
Link: https://lore.kernel.org/lkml/20220331065640.5777-2-songmuchun@bytedance.com/
Link: https://lore.kernel.org/r/20221024094725.3054311-2-tongtiangen@huawei.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 8a5c246..c172d05 100644 (file)
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -17,6 +17,13 @@ static inline void local_flush_icache_all(void)
 
 static inline void flush_dcache_page(struct page *page)
 {
+       /*
+        * HugeTLB pages are always fully mapped and only head page will be
+        * set PG_dcache_clean (see comments in flush_icache_pte()).
+        */
+       if (PageHuge(page))
+               page = compound_head(page);
+
        if (test_bit(PG_dcache_clean, &page->flags))
                clear_bit(PG_dcache_clean, &page->flags);
 }

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96..062559c 100644 (file)
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,6 +82,13 @@ void flush_icache_pte(pte_t pte)
 {
        struct page *page = pte_page(pte);
 
+       /*
+        * HugeTLB pages are always fully mapped, so only setting head page's
+        * PG_dcache_clean flag is enough.
+        */
+       if (PageHuge(page))
+               page = compound_head(page);
+
        if (!test_and_set_bit(PG_dcache_clean, &page->flags))
                flush_icache_all();
 }