config TARGET_MALTA
bool "Support malta"
+ select HAS_FIXED_TIMER_FREQUENCY
select BOARD_EARLY_INIT_R
select DM
select DM_SERIAL
select SWAP_IO_SPACE
imply CMD_DM
-config TARGET_VCT
- bool "Support vct"
- select ROM_EXCEPTION_VECTORS
- select SUPPORTS_BIG_ENDIAN
- select SUPPORTS_CPU_MIPS32_R1
- select SUPPORTS_CPU_MIPS32_R2
- select SYS_MIPS_CACHE_INIT_RAM_LOAD
-
config ARCH_ATH79
bool "Support QCA/Atheros ath79"
+ select HAS_FIXED_TIMER_FREQUENCY
select DM
select OF_CONTROL
imply CMD_DM
config ARCH_MSCC
bool "Support MSCC VCore-III"
+ select HAS_FIXED_TIMER_FREQUENCY
select OF_CONTROL
select DM
config ARCH_BMIPS
bool "Support BMIPS SoCs"
+ select HAS_FIXED_TIMER_FREQUENCY
select CLK
select CPU
select DM
config ARCH_MTMIPS
bool "Support MediaTek MIPS platforms"
+ select HAS_FIXED_TIMER_FREQUENCY
select CLK
imply CMD_DM
select DISPLAY_CPUINFO
config ARCH_JZ47XX
bool "Support Ingenic JZ47xx"
select SUPPORT_SPL
+ select HAS_FIXED_TIMER_FREQUENCY
select OF_CONTROL
select DM
config MACH_PIC32
bool "Support Microchip PIC32"
+ select HAS_FIXED_TIMER_FREQUENCY
select DM
select OF_CONTROL
imply CMD_DM
config TARGET_BOSTON
bool "Support Boston"
+ select HAS_FIXED_TIMER_FREQUENCY
select DM
imply DM_EVENT
select DM_SERIAL
config TARGET_XILFPGA
bool "Support Imagination Xilfpga"
+ select HAS_FIXED_TIMER_FREQUENCY
select DM
select DM_ETH
select DM_GPIO
Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
In that case the image size will be reduced by 0x500 bytes.
+config SYS_MIPS_TIMER_FREQ
+ int "Fixed MIPS CPU timer frequency in Hz"
+ depends on HAS_FIXED_TIMER_FREQUENCY
+ help
+ Configures a fixed CPU timer frequency.
+
config MIPS_CM_BASE
hex "MIPS CM GCR Base Address"
depends on MIPS_CM
config SUPPORTS_CPU_MIPS64_OCTEON
bool
+config HAS_FIXED_TIMER_FREQUENCY
+ bool
+
config CPU_CAVIUM_OCTEON
bool
/* PLL setup */
#define JZ4780_SYS_EXTAL 48000000
-#define JZ4780_SYS_MEM_SPEED (CONFIG_SYS_MHZ * 1000000)
+#define JZ4780_SYS_MEM_SPEED (1200 * 1000000)
#define JZ4780_SYS_MEM_DIV 3
#define JZ4780_SYS_AUDIO_SPEED (768 * 1000000)
((2 - 1) << CPM_CPCCR_L2DIV_BIT) |
((1 - 1) << CPM_CPCCR_CDIV_BIT);
- if (CONFIG_SYS_MHZ >= 1000)
- clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
- else
- clk_ctrl |= (6 - 1) << CPM_CPCCR_PDIV_BIT;
-
+ clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl);
while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY |
.pulldn = 0x0e,
};
-#if (CONFIG_SYS_MHZ != 1200)
-#error No DDR configuration for CPU speed
-#endif
-
const struct jz4780_ddr_config *jz4780_get_ddr_config(void)
{
const int board_revision = ci20_revision();
default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
default 0x10000 if ARCH_KEYSTONE
default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
+ default 0x0 if ARCH_MTMIPS
default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
default SPL_MAX_SIZE
help
err = get_descriptor_len(dev, 64, 8);
if (err)
return err;
+
+ /*
+ * Logitech Unifying Receiver 046d:c52b bcdDevice 12.10 seems
+ * sensitive about the first Get Descriptor request. If there
+ * are any other requests in the same microframe, the device
+ * reports bogus data, first of the descriptor parts is not
+ * sent to the host. Wait over one microframe duration here
+ * (1mS for USB 1.x , 125uS for USB 2.0) to avoid triggering
+ * the issue.
+ */
+ mdelay(1);
}
dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0;
ret = device_unbind(dev);
if (ret)
return ret;
+ continue;
}
ret = blk_probe_or_unbind(dev);
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ARCH_ATH79=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ARCH_ATH79=y
CONFIG_TARGET_AP143=y
+CONFIG_SYS_MIPS_TIMER_FREQ=325000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ARCH_ATH79=y
CONFIG_TARGET_AP152=y
+CONFIG_SYS_MIPS_TIMER_FREQ=375000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_STORAGE=y
# CONFIG_EFI_LOADER is not set
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_LCD_BGR555=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6838=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_ENV_ADDR=0xBFFE0000
CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_ENV_ADDR=0xBFFE0000
CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ARCH_JZ47XX=y
+CONFIG_SYS_MIPS_TIMER_FREQ=1200000000
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6318=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6328=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6348=y
+CONFIG_SYS_MIPS_TIMER_FREQ=128000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_WDT_BCM6345=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM63268=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6368=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="lpc32xx-ohci"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_OHCI_LPC32XX=y
CONFIG_OF_LIBFDT=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_PANIC_HANG=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_PANIC_HANG=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6358=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_SYS_PROMPT="MIPSfpga # "
CONFIG_SYS_LOAD_ADDR=0x80500000
CONFIG_TARGET_XILFPGA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=50000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_LINKIT_SMART_7688=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
CONFIG_TARGET_MALTA=y
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_TARGET_MALTA=y
CONFIG_BUILD_TARGET="u-boot-swap.bin"
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_SYS_LITTLE_ENDIAN=y
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_ADDR=0xBE3E0000
CONFIG_TARGET_MALTA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_ENV_ADDR=0xBE3E0000
CONFIG_TARGET_MALTA=y
CONFIG_BUILD_TARGET="u-boot-swap.bin"
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_SYS_LITTLE_ENDIAN=y
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_ARCH_MSCC=y
CONFIG_SOC_JR2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_ARCH_MSCC=y
CONFIG_SOC_LUTON=y
CONFIG_DDRTYPE_MT47H128M8HQ=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_ENV_OFFSET_REDUND=0x140000
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_ARCH_MSCC=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_ARCH_MSCC=y
CONFIG_SOC_SERVAL=y
CONFIG_DDRTYPE_H5TQ1G63BFA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_ARCH_MSCC=y
CONFIG_SOC_SERVALT=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_ARCH_MTMIPS=y
CONFIG_BOARD_MT7620_MT7530_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_DEBUG_UART_CLOCK=40000000
CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_ARCH_MTMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_SOC_MT7621=y
CONFIG_MT7621_BOOT_FROM_NAND=y
CONFIG_BOARD_MT7621_NAND_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
# CONFIG_MIPS_CACHE_SETUP is not set
# CONFIG_MIPS_CACHE_DISABLE is not set
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_SYS_LOAD_ADDR=0x83000000
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7621=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
# CONFIG_MIPS_CACHE_SETUP is not set
# CONFIG_MIPS_CACHE_DISABLE is not set
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_MT7628_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_SYS_PROMPT="CG3100D # "
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6362=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_SYS_PROMPT="dask # "
CONFIG_SYS_LOAD_ADDR=0x88500000
CONFIG_MACH_PIC32=y
+CONFIG_SYS_MIPS_TIMER_FREQ=100000000
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_SYS_MEMTEST_START=0x88000000
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_BPP32 is not set
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263"
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_BPP32 is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6338=y
+CONFIG_SYS_MIPS_TIMER_FREQ=120000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_SPL_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_USB_ATMEL_CLK_SEL_UPLL=y
CONFIG_USB_STORAGE=y
CONFIG_SPL_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_USB_ATMEL_CLK_SEL_UPLL=y
CONFIG_USB_STORAGE=y
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6358=y
CONFIG_BOARD_SFR_NB4_SER=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_RMII=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_PCI=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15
CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y
CONFIG_USB_STORAGE=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_ATMEL=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
CONFIG_SYS_LOAD_ADDR=0xa1000000
CONFIG_ARCH_ATH79=y
CONFIG_BOARD_TPLINK_WDR4300=y
+CONFIG_SYS_MIPS_TIMER_FREQ=280000000
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_SYS_MAX_FLASH_SECT=259
CONFIG_PCI=y
CONFIG_USB=y
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_VOCORE2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
CONFIG_MIPS_CACHE_SETUP=y
CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name
- CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
- root hub.
-
-
Endianness issues
------------------
string "Display name for the OHCI controller"
depends on USB_OHCI_NEW && !DM_USB
-config SYS_USB_OHCI_MAX_ROOT_PORTS
- int "Maximal number of ports of the root hub"
- depends on USB_OHCI_NEW
- default 1 if ARCH_SUNXI
-
config SYS_OHCI_SWAP_REG_ACCESS
bool "Perform byte swapping on OHCI controller register accesses"
depends on USB_OHCI_NEW
u8 reserved_for_hc[116];
} __attribute__((aligned(256)));
-
-/*
- * Maximum number of root hub ports.
- */
-#ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#endif
-
/*
* This is the structure of the OHCI controller's memory mapped I/O
* region. This is Memory Mapped I/O. You must use the ohci_readl() and
__u32 a;
__u32 b;
__u32 status;
- __u32 portstatus[CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS];
+ __u32 portstatus[];
} roothub;
} __attribute__((aligned(32)));
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_MHZ 200
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_MHZ 325
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_MHZ 375
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 160000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 120000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 128000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 150000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <linux/sizes.h>
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 160000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/*
* CPU
*/
-#define CONFIG_SYS_MIPS_TIMER_FREQ 30000000
/*
* PCI
#ifndef __CONFIG_CI20_H__
#define __CONFIG_CI20_H__
-/* Ingenic JZ4780 clock configuration. */
-#define CONFIG_SYS_MHZ 1200
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-
/* Memory configuration */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
#define __CONFIG_GARDENA_SMART_GATEWAY_H
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/*--------------------------------------------
* CPU configuration
*/
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
/*----------------------------------------------------------------------
* Memory Layout
#ifndef __CONFIG_LINKIT_SMART_7688_H
#define __CONFIG_LINKIT_SMART_7688_H
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/*
* CPU Configuration
*/
-#define CONFIG_SYS_MHZ 250 /* arbitrary value */
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
/*
* Memory map
#ifndef __CONFIG_MT7620_H
#define __CONFIG_MT7620_H
-#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#ifndef __CONFIG_MT7621_H
#define __CONFIG_MT7621_H
-#define CONFIG_SYS_MIPS_TIMER_FREQ 440000000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_VERY_BIG_RAM
#ifndef __CONFIG_MT7628_H
#define __CONFIG_MT7628_H
-#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_OFFSET 0x80000
/*--------------------------------------------
* CPU configuration
*/
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 100000000
/*----------------------------------------------------------------------
* Memory Layout
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_MHZ 280
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-
#define CONFIG_SYS_SDRAM_BASE 0xa0000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
-#define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
-#else
-#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
-#endif
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#ifndef __VOCORE2_CONFIG_H__
#define __VOCORE2_CONFIG_H__
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
-
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEM_RESERVE_SECURE
CONFIG_SYS_MFD
-CONFIG_SYS_MHZ
-CONFIG_SYS_MIPS_TIMER_FREQ
CONFIG_SYS_MMC_CD_PIN
CONFIG_SYS_MMC_CLK_OD
CONFIG_SYS_MMC_MAX_BLK_COUNT