* 9-0: pr ndes
*/
-#define ET_DMA10_MASK 0x3FF /* 10 bit mask for DMA10W types */
-#define ET_DMA10_WRAP 0x400
-#define ET_DMA4_MASK 0x00F /* 4 bit mask for DMA4W types */
-#define ET_DMA4_WRAP 0x010
-
+#define ET_DMA12_MASK 0x0FFF /* 12 bit mask for DMA12W types */
+#define ET_DMA12_WRAP 0x1000
+#define ET_DMA10_MASK 0x03FF /* 10 bit mask for DMA10W types */
+#define ET_DMA10_WRAP 0x0400
+#define ET_DMA4_MASK 0x000F /* 4 bit mask for DMA4W types */
+#define ET_DMA4_WRAP 0x0010
+
+#define INDEX12(x) ((x) & ET_DMA12_MASK)
#define INDEX10(x) ((x) & ET_DMA10_MASK)
#define INDEX4(x) ((x) & ET_DMA4_MASK)
*v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP);
}
+extern inline void add_12bit(u32 *v, int n)
+{
+ *v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP);
+}
+
/*
* 10bit DMA with wrap
* txdma tx queue write address reg in txdma address map at 0x1010
/* Indicate that we have used this PSR entry. */
/* FIXME wrap 12 */
- rx_local->local_psr_full = (rx_local->local_psr_full + 1) & 0xFFF;
- if (rx_local->local_psr_full > rx_local->PsrNumEntries - 1) {
+ add_12bit(&rx_local->local_psr_full, 1);
+ if ((rx_local->local_psr_full & 0xFFF) > rx_local->PsrNumEntries - 1) {
/* Clear psr full and toggle the wrap bit */
- rx_local->local_psr_full &= 0xFFF;
+ rx_local->local_psr_full &= ~0xFFF;
rx_local->local_psr_full ^= 0x1000;
}