Simplifies throughput to the issue width (1/2) instead of permitting any pipe (1/6)
llvm-svn: 327632
def JFPU0 : ProcResource<1>; // Vector/FPU Pipe0: VALU0/VIMUL/FPA
def JFPU1 : ProcResource<1>; // Vector/FPU Pipe1: VALU1/STC/FPM
-// Any pipe - FIXME we need this until we can discriminate between int/fpu load/store/moves properly
-def JAny : ProcResGroup<[JALU0, JALU1, JLAGU, JSAGU, JFPU0, JFPU1]>;
-
// Integer Pipe Scheduler
def JALU01 : ProcResGroup<[JALU0, JALU1]> {
let BufferSize=20;
////////////////////////////////////////////////////////////////////////////////
// Special case scheduling classes.
-// FIXME: pipe for system/microcode?
////////////////////////////////////////////////////////////////////////////////
-def : WriteRes<WriteSystem, [JAny]> { let Latency = 100; }
-def : WriteRes<WriteMicrocoded, [JAny]> { let Latency = 100; }
+def : WriteRes<WriteSystem, [JALU01]> { let Latency = 100; }
+def : WriteRes<WriteMicrocoded, [JALU01]> { let Latency = 100; }
def : WriteRes<WriteFence, [JSAGU]>;
def : WriteRes<WriteNop, []>;
;
; BTVER2-LABEL: test_emms:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: emms # sched: [100:0.17]
+; BTVER2-NEXT: emms # sched: [100:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_emms:
; BTVER2: # %bb.0:
; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: aaa # sched: [100:0.17]
+; BTVER2-NEXT: aaa # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: aad # sched: [100:0.17]
+; BTVER2-NEXT: aad # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: aam # sched: [100:0.17]
+; BTVER2-NEXT: aam # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: aas # sched: [100:0.17]
+; BTVER2-NEXT: aas # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.17]
+; BTVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %esi # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: bound %ax, (%esi) # sched: [100:0.17]
-; BTVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.17]
+; BTVER2-NEXT: bound %ax, (%esi) # sched: [100:0.50]
+; BTVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: popl %esi # sched: [5:1.00]
; BTVER2-NEXT: retl # sched: [4:1.00]
; BTVER2: # %bb.0:
; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: daa # sched: [100:0.17]
+; BTVER2-NEXT: daa # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: das # sched: [100:0.17]
+; BTVER2-NEXT: das # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_into:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: into # sched: [100:0.17]
+; BTVER2-NEXT: into # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_pop_push:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: popl %ds # sched: [100:0.17]
-; BTVER2-NEXT: popl %es # sched: [100:0.17]
-; BTVER2-NEXT: popl %ss # sched: [100:0.17]
-; BTVER2-NEXT: popl %fs # sched: [100:0.17]
-; BTVER2-NEXT: popl %gs # sched: [100:0.17]
-; BTVER2-NEXT: pushl %cs # sched: [100:0.17]
-; BTVER2-NEXT: pushl %ds # sched: [100:0.17]
-; BTVER2-NEXT: pushl %es # sched: [100:0.17]
-; BTVER2-NEXT: pushl %ss # sched: [100:0.17]
-; BTVER2-NEXT: pushl %fs # sched: [100:0.17]
-; BTVER2-NEXT: pushl %gs # sched: [100:0.17]
+; BTVER2-NEXT: popl %ds # sched: [100:0.50]
+; BTVER2-NEXT: popl %es # sched: [100:0.50]
+; BTVER2-NEXT: popl %ss # sched: [100:0.50]
+; BTVER2-NEXT: popl %fs # sched: [100:0.50]
+; BTVER2-NEXT: popl %gs # sched: [100:0.50]
+; BTVER2-NEXT: pushl %cs # sched: [100:0.50]
+; BTVER2-NEXT: pushl %ds # sched: [100:0.50]
+; BTVER2-NEXT: pushl %es # sched: [100:0.50]
+; BTVER2-NEXT: pushl %ss # sched: [100:0.50]
+; BTVER2-NEXT: pushl %fs # sched: [100:0.50]
+; BTVER2-NEXT: pushl %gs # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_cmps:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [100:0.17]
-; BTVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [100:0.17]
-; BTVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [100:0.17]
-; BTVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [100:0.17]
+; BTVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [100:0.50]
+; BTVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [100:0.50]
+; BTVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [100:0.50]
+; BTVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cpuid:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: cpuid # sched: [100:0.17]
+; BTVER2-NEXT: cpuid # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: enter $7, $4095 # imm = 0xFFF
-; BTVER2-NEXT: # sched: [100:0.17]
+; BTVER2-NEXT: # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_in:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: inb $7, %al # sched: [100:0.17]
-; BTVER2-NEXT: inw $7, %ax # sched: [100:0.17]
-; BTVER2-NEXT: inl $7, %eax # sched: [100:0.17]
-; BTVER2-NEXT: inb %dx, %al # sched: [100:0.17]
-; BTVER2-NEXT: inw %dx, %ax # sched: [100:0.17]
-; BTVER2-NEXT: inl %dx, %eax # sched: [100:0.17]
+; BTVER2-NEXT: inb $7, %al # sched: [100:0.50]
+; BTVER2-NEXT: inw $7, %ax # sched: [100:0.50]
+; BTVER2-NEXT: inl $7, %eax # sched: [100:0.50]
+; BTVER2-NEXT: inb %dx, %al # sched: [100:0.50]
+; BTVER2-NEXT: inw %dx, %ax # sched: [100:0.50]
+; BTVER2-NEXT: inl %dx, %eax # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_ins:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.17]
+; BTVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_int:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: int $7 # sched: [100:0.17]
+; BTVER2-NEXT: int $7 # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_invlpg_invlpga:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: invlpg (%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.17]
+; BTVER2-NEXT: invlpg (%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_lods:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: lodsb (%rsi), %al # sched: [100:0.17]
-; BTVER2-NEXT: lodsw (%rsi), %ax # sched: [100:0.17]
-; BTVER2-NEXT: lodsl (%rsi), %eax # sched: [100:0.17]
-; BTVER2-NEXT: lodsq (%rsi), %rax # sched: [100:0.17]
+; BTVER2-NEXT: lodsb (%rsi), %al # sched: [100:0.50]
+; BTVER2-NEXT: lodsw (%rsi), %ax # sched: [100:0.50]
+; BTVER2-NEXT: lodsl (%rsi), %eax # sched: [100:0.50]
+; BTVER2-NEXT: lodsq (%rsi), %rax # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_movs:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [100:0.17]
+; BTVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_out:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: outb %al, $7 # sched: [100:0.17]
-; BTVER2-NEXT: outw %ax, $7 # sched: [100:0.17]
-; BTVER2-NEXT: outl %eax, $7 # sched: [100:0.17]
-; BTVER2-NEXT: outb %al, %dx # sched: [100:0.17]
-; BTVER2-NEXT: outw %ax, %dx # sched: [100:0.17]
-; BTVER2-NEXT: outl %eax, %dx # sched: [100:0.17]
+; BTVER2-NEXT: outb %al, $7 # sched: [100:0.50]
+; BTVER2-NEXT: outw %ax, $7 # sched: [100:0.50]
+; BTVER2-NEXT: outl %eax, $7 # sched: [100:0.50]
+; BTVER2-NEXT: outb %al, %dx # sched: [100:0.50]
+; BTVER2-NEXT: outw %ax, %dx # sched: [100:0.50]
+; BTVER2-NEXT: outl %eax, %dx # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_outs:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.17]
-; BTVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.17]
-; BTVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.17]
+; BTVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.50]
+; BTVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.50]
+; BTVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_pop_push:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: popq %fs # sched: [100:0.17]
-; BTVER2-NEXT: popq %gs # sched: [100:0.17]
-; BTVER2-NEXT: pushq %fs # sched: [100:0.17]
-; BTVER2-NEXT: pushq %gs # sched: [100:0.17]
+; BTVER2-NEXT: popq %fs # sched: [100:0.50]
+; BTVER2-NEXT: popq %gs # sched: [100:0.50]
+; BTVER2-NEXT: pushq %fs # sched: [100:0.50]
+; BTVER2-NEXT: pushq %gs # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_rdmsr_wrmsr:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: rdmsr # sched: [100:0.17]
-; BTVER2-NEXT: wrmsr # sched: [100:0.17]
+; BTVER2-NEXT: rdmsr # sched: [100:0.50]
+; BTVER2-NEXT: wrmsr # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_rdpmc:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: rdpmc # sched: [100:0.17]
+; BTVER2-NEXT: rdpmc # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_rdtsc_rdtscp:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: rdtsc # sched: [100:0.17]
-; BTVER2-NEXT: rdtscp # sched: [100:0.17]
+; BTVER2-NEXT: rdtsc # sched: [100:0.50]
+; BTVER2-NEXT: rdtscp # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_scas:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: scasb %es:(%rdi), %al # sched: [100:0.17]
-; BTVER2-NEXT: scasw %es:(%rdi), %ax # sched: [100:0.17]
-; BTVER2-NEXT: scasl %es:(%rdi), %eax # sched: [100:0.17]
-; BTVER2-NEXT: scasq %es:(%rdi), %rax # sched: [100:0.17]
+; BTVER2-NEXT: scasb %es:(%rdi), %al # sched: [100:0.50]
+; BTVER2-NEXT: scasw %es:(%rdi), %ax # sched: [100:0.50]
+; BTVER2-NEXT: scasl %es:(%rdi), %eax # sched: [100:0.50]
+; BTVER2-NEXT: scasq %es:(%rdi), %rax # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_stos:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: stosb %al, %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [100:0.17]
-; BTVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [100:0.17]
+; BTVER2-NEXT: stosb %al, %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [100:0.50]
+; BTVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_ud2:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: ud2 # sched: [100:0.17]
+; BTVER2-NEXT: ud2 # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: leaq (%rdi), %rax # sched: [1:0.50]
; BTVER2-NEXT: movl %esi, %ecx # sched: [1:0.50]
-; BTVER2-NEXT: monitor # sched: [100:0.17]
+; BTVER2-NEXT: monitor # sched: [100:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_monitor:
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl %edi, %ecx # sched: [1:0.50]
; BTVER2-NEXT: movl %esi, %eax # sched: [1:0.50]
-; BTVER2-NEXT: mwait # sched: [100:0.17]
+; BTVER2-NEXT: mwait # sched: [100:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_mwait:
; BTVER2-LABEL: test_f2xm1:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: f2xm1 # sched: [100:0.17]
+; BTVER2-NEXT: f2xm1 # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fbld (%eax) # sched: [100:0.17]
-; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: fbld (%eax) # sched: [100:0.50]
+; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fclex:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.17]
-; BTVER2-NEXT: fnclex # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
+; BTVER2-NEXT: fnclex # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fnclex:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnclex # sched: [100:0.17]
+; BTVER2-NEXT: fnclex # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-NEXT: fcomp %st(3) # sched: [3:1.00]
; BTVER2-NEXT: fcomps (%ecx) # sched: [8:1.00]
; BTVER2-NEXT: fcompl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: fcompp # sched: [100:0.17]
+; BTVER2-NEXT: fcompp # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fcos:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcos # sched: [100:0.17]
+; BTVER2-NEXT: fcos # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fdecstp:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdecstp # sched: [100:0.17]
+; BTVER2-NEXT: fdecstp # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_ffree:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: ffree %st(0) # sched: [100:0.17]
+; BTVER2-NEXT: ffree %st(0) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fincstp:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fincstp # sched: [100:0.17]
+; BTVER2-NEXT: fincstp # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_finit:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.17]
-; BTVER2-NEXT: fninit # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
+; BTVER2-NEXT: fninit # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fninit:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fninit # sched: [100:0.17]
+; BTVER2-NEXT: fninit # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fldcw (%eax) # sched: [5:1.00]
-; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fld1 # sched: [1:?]
-; BTVER2-NEXT: fldl2e # sched: [100:0.17]
-; BTVER2-NEXT: fldl2t # sched: [100:0.17]
-; BTVER2-NEXT: fldln2 # sched: [100:0.17]
-; BTVER2-NEXT: fldpi # sched: [100:0.17]
+; BTVER2-NEXT: fldl2e # sched: [100:0.50]
+; BTVER2-NEXT: fldl2t # sched: [100:0.50]
+; BTVER2-NEXT: fldln2 # sched: [100:0.50]
+; BTVER2-NEXT: fldpi # sched: [100:0.50]
; BTVER2-NEXT: fldz # sched: [1:?]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
; BTVER2-LABEL: test_fnop:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnop # sched: [100:0.17]
+; BTVER2-NEXT: fnop # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fpatan:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fpatan # sched: [100:0.17]
+; BTVER2-NEXT: fpatan # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fprem_fprem1:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fprem # sched: [100:0.17]
-; BTVER2-NEXT: fprem1 # sched: [100:0.17]
+; BTVER2-NEXT: fprem # sched: [100:0.50]
+; BTVER2-NEXT: fprem1 # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fptan:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fptan # sched: [100:0.17]
+; BTVER2-NEXT: fptan # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_frndint:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: frndint # sched: [100:0.17]
+; BTVER2-NEXT: frndint # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: frstor (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: frstor (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.17]
-; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
+; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fscale:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fscale # sched: [100:0.17]
+; BTVER2-NEXT: fscale # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fsin:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsin # sched: [100:0.17]
+; BTVER2-NEXT: fsin # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fsincos:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsincos # sched: [100:0.17]
+; BTVER2-NEXT: fsincos # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BTVER2-NEXT: wait # sched: [100:0.17]
-; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.17]
-; BTVER2-NEXT: wait # sched: [100:0.17]
-; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
+; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
+; BTVER2-NEXT: wait # sched: [100:0.50]
+; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.17]
-; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
+; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fwait:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.17]
+; BTVER2-NEXT: wait # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fxam:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxam # sched: [100:0.17]
+; BTVER2-NEXT: fxam # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.17]
-; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.17]
+; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.50]
+; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fxtract:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxtract # sched: [100:0.17]
+; BTVER2-NEXT: fxtract # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fyl2x:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fyl2x # sched: [100:0.17]
+; BTVER2-NEXT: fyl2x # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; BTVER2-LABEL: test_fyl2xp1:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fyl2xp1 # sched: [100:0.17]
+; BTVER2-NEXT: fyl2xp1 # sched: [100:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;