anv: Use specific flush reasons for CCS operations
authorNanley Chery <nanley.g.chery@intel.com>
Wed, 30 Nov 2022 21:50:57 +0000 (13:50 -0800)
committerMarge Bot <emma+marge@anholt.net>
Tue, 6 Dec 2022 00:49:17 +0000 (00:49 +0000)
When INTEL_DEBUG=pc is set and a CCS operation is being performed, the
driver reports that flushes are happing before and after the operation.
It also reports that the operation is a fast clear, but that's not
always the case. We could be resolving for example.

Reporting the specific operation can help avoid confusion.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20118>

src/intel/vulkan/anv_blorp.c

index 6eacf456b9174ad9a16174c11134161010eeceb7..70b2319a5bf101f68b1cc9b78acb274addd221b1 100644 (file)
@@ -1768,6 +1768,24 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
    if (clear_value)
       surf.clear_color = *clear_value;
 
+   char *flush_reason = NULL;
+   switch (ccs_op) {
+   case ISL_AUX_OP_FAST_CLEAR:
+      flush_reason = "ccs op start: fast clear";
+      break;
+   case ISL_AUX_OP_FULL_RESOLVE:
+      flush_reason = "ccs op start: full resolve";
+      break;
+   case ISL_AUX_OP_PARTIAL_RESOLVE:
+      flush_reason = "ccs op start: partial resolve";
+      break;
+   case ISL_AUX_OP_AMBIGUATE:
+      flush_reason = "ccs op start: ambiguate";
+      break;
+   default:
+      unreachable("Unsupported CCS operation");
+   }
+
    /* From the Sky Lake PRM Vol. 7, "Render Target Fast Clear":
     *
     *    "After Render target fast clear, pipe-control with color cache
@@ -1793,7 +1811,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
                                 ANV_PIPE_DATA_CACHE_FLUSH_BIT : 0) |
                              ANV_PIPE_PSS_STALL_SYNC_BIT |
                              ANV_PIPE_END_OF_PIPE_SYNC_BIT,
-                             "before fast clear ccs");
+                             flush_reason);
 
    switch (ccs_op) {
    case ISL_AUX_OP_FAST_CLEAR:
@@ -1833,7 +1851,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
                                 ANV_PIPE_DEPTH_STALL_BIT : 0) |
                              ANV_PIPE_PSS_STALL_SYNC_BIT |
                              ANV_PIPE_END_OF_PIPE_SYNC_BIT,
-                             "after fast clear ccs");
+                             "ccs op finish");
 
    anv_blorp_batch_finish(&batch);
 }