[DivRemPairs] Don't assert that we won't ever get expanded-form rem pairs in differen...

If we happen to have the same div in two basic blocks,
and in one of those we also happen to have the rem part,
we'd match the div-rem pair, but the wrong ones.
So let's drop overly-ambiguous assert.

Fixes https://bugs.llvm.org/show_bug.cgi?id=43500

llvm-svn: 373167

diff --git a/llvm/lib/Transforms/Scalar/DivRemPairs.cpp b/llvm/lib/Transforms/Scalar/DivRemPairs.cpp
index 4f53874..9348535 100644 (file)
--- a/llvm/lib/Transforms/Scalar/DivRemPairs.cpp
+++ b/llvm/lib/Transforms/Scalar/DivRemPairs.cpp
@@ -233,8 +233,6 @@ static bool optimizeDivRem(Function &F, const TargetTransformInfo &TTI,
     if (!DivDominates && !DT.dominates(RemInst, DivInst)) {
       // We have matching div-rem pair, but they are in two different blocks,
       // neither of which dominates one another.
-      assert(!RemOriginallyWasInExpandedForm &&
-             "Won't happen for expanded-form rem.");
       // FIXME: We could hoist both ops to the common predecessor block?
       continue;
     }

diff --git a/llvm/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll b/llvm/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll
index 792ef9c..7c43d87 100644 (file)
--- a/llvm/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll
+++ b/llvm/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll
@@ -168,3 +168,39 @@ end:
   %ret = phi i128 [ %rem, %if ], [ 3, %entry ]
   ret i128 %ret
 }
+
+; Even in expanded form, we can end up with div and rem in different basic
+; blocks neither of which dominates each another.
+define i32 @can_have_divrem_in_mutually_nondominating_bbs(i1 %cmp, i32 %a, i32 %b) {
+; CHECK-LABEL: @can_have_divrem_in_mutually_nondominating_bbs(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 [[CMP:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    [[T0:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[T1:%.*]] = mul nuw i32 [[T0]], [[B]]
+; CHECK-NEXT:    [[T2_RECOMPOSED:%.*]] = urem i32 [[A]], [[B]]
+; CHECK-NEXT:    br label [[END:%.*]]
+; CHECK:       if.else:
+; CHECK-NEXT:    [[T3:%.*]] = udiv i32 [[A]], [[B]]
+; CHECK-NEXT:    br label [[END]]
+; CHECK:       end:
+; CHECK-NEXT:    [[RET:%.*]] = phi i32 [ [[T2_RECOMPOSED]], [[IF_THEN]] ], [ [[T3]], [[IF_ELSE]] ]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+entry:
+  br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+  %t0 = udiv i32 %a, %b
+  %t1 = mul nuw i32 %t0, %b
+  %t2 = sub i32 %a, %t1
+  br label %end
+
+if.else:
+  %t3 = udiv i32 %a, %b
+  br label %end
+
+end:
+  %ret = phi i32 [ %t2, %if.then ], [ %t3, %if.else ]
+  ret i32 %ret
+}