drm/amdgpu: don't init GDS pool if GDS size is 0 (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Mar 2017 13:45:48 +0000 (09:45 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:53:52 +0000 (23:53 -0400)
SI cards don't expose GDS as a separate pool.  The CP manages
GDS and the UMDs use special CP packets to allocate GDS memory.

v2: drop extra whitespace change

bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

index 987f8f0..244bb9a 100644 (file)
@@ -1158,27 +1158,33 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
        adev->gds.oa.gfx_partition_size = adev->gds.oa.gfx_partition_size << AMDGPU_OA_SHIFT;
        adev->gds.oa.cs_partition_size = adev->gds.oa.cs_partition_size << AMDGPU_OA_SHIFT;
        /* GDS Memory */
-       r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,
-                               adev->gds.mem.total_size >> PAGE_SHIFT);
-       if (r) {
-               DRM_ERROR("Failed initializing GDS heap.\n");
-               return r;
+       if (adev->gds.mem.total_size) {
+               r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,
+                                  adev->gds.mem.total_size >> PAGE_SHIFT);
+               if (r) {
+                       DRM_ERROR("Failed initializing GDS heap.\n");
+                       return r;
+               }
        }
 
        /* GWS */
-       r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS,
-                               adev->gds.gws.total_size >> PAGE_SHIFT);
-       if (r) {
-               DRM_ERROR("Failed initializing gws heap.\n");
-               return r;
+       if (adev->gds.gws.total_size) {
+               r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS,
+                                  adev->gds.gws.total_size >> PAGE_SHIFT);
+               if (r) {
+                       DRM_ERROR("Failed initializing gws heap.\n");
+                       return r;
+               }
        }
 
        /* OA */
-       r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA,
-                               adev->gds.oa.total_size >> PAGE_SHIFT);
-       if (r) {
-               DRM_ERROR("Failed initializing oa heap.\n");
-               return r;
+       if (adev->gds.oa.total_size) {
+               r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA,
+                                  adev->gds.oa.total_size >> PAGE_SHIFT);
+               if (r) {
+                       DRM_ERROR("Failed initializing oa heap.\n");
+                       return r;
+               }
        }
 
        r = amdgpu_ttm_debugfs_init(adev);
@@ -1206,9 +1212,12 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
        }
        ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM);
        ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT);
-       ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GDS);
-       ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GWS);
-       ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_OA);
+       if (adev->gds.mem.total_size)
+               ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GDS);
+       if (adev->gds.gws.total_size)
+               ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GWS);
+       if (adev->gds.oa.total_size)
+               ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_OA);
        ttm_bo_device_release(&adev->mman.bdev);
        amdgpu_gart_fini(adev);
        amdgpu_ttm_global_fini(adev);