#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
+#include <linux/pm_qos_params.h>
#include <asm/intel_scu_ipc.h>
#include <asm/intel_mid_gpadc.h>
#define GPADC_CH_MAX 15
+#define PM_QOS_ADC_DRV_VALUE 4999
+
struct gpadc_info {
int initialized;
/* This mutex protects gpadc sample/config from concurrent conflict.
int rnd_done;
int conv_done;
int gsmpulse_done;
+
+ struct pm_qos_request_list pm_qos_request;
};
struct gpadc_request {
return -ENODEV;
mutex_lock(&mgi->lock);
+ pm_qos_add_request(&mgi->pm_qos_request,
+ PM_QOS_CPU_DMA_LATENCY, PM_QOS_ADC_DRV_VALUE);
gpadc_write(ADC1CNTL2, ADC1CNTL2_DEF);
gpadc_set_bits(ADC1CNTL2, ADC1CNTL2_ADCGSMEN);
gpadc_clear_bits(ADC1CNTL3, ADC1CNTL3_GSMDATARD);
fail:
gpadc_clear_bits(ADC1CNTL2, ADC1CNTL2_ADCGSMEN);
+ pm_qos_remove_request(&mgi->pm_qos_request);
mutex_unlock(&mgi->lock);
return ret;
va_end(args);
mutex_lock(&mgi->lock);
+ pm_qos_add_request(&mgi->pm_qos_request,
+ PM_QOS_CPU_DMA_LATENCY, PM_QOS_ADC_DRV_VALUE);
gpadc_poweron(mgi, rq->vref);
gpadc_clear_bits(ADC1CNTL1, ADC1CNTL1_AD1OFFSETEN);
gpadc_read(ADC1CNTL1, &data);
fail:
gpadc_clear_bits(ADC1CNTL1, ADC1CNTL1_ADSTRT);
gpadc_poweroff(mgi);
+ pm_qos_remove_request(&mgi->pm_qos_request);
mutex_unlock(&mgi->lock);
return ret;
}