Oops, killed too much.
authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 14 Nov 1998 00:01:18 +0000 (00:01 +0000)
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 14 Nov 1998 00:01:18 +0000 (00:01 +0000)
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@23653 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/config/alpha/alpha.md

index b237eae..80f2208 100644 (file)
    s%2addq %1,%3,%0
    s%2subq %1,%n3,%0")
 
+;; These variants of the above insns can occur if the third operand
+;; is the frame pointer.  This is a kludge, but there doesn't
+;; seem to be a way around it.  Only recognize them while reloading.
+
+(define_insn ""
+  [(set (match_operand:DI 0 "some_operand" "=&r")
+       (plus:DI (plus:DI (match_operand:DI 1 "some_operand" "r")
+                         (match_operand:DI 2 "some_operand" "r"))
+                (match_operand:DI 3 "some_operand" "rIOKL")))]
+  "reload_in_progress"
+  "#")
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+       (plus:DI (plus:DI (match_operand:DI 1 "register_operand" "")
+                         (match_operand:DI 2 "register_operand" ""))
+                (match_operand:DI 3 "add_operand" "")))]
+  "reload_completed"
+  [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))]
+  "")
+                                          
+(define_insn ""
+  [(set (match_operand:SI 0 "some_operand" "=&r")
+       (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ")
+                                  (match_operand:SI 2 "const48_operand" "I"))
+                         (match_operand:SI 3 "some_operand" "r"))
+                (match_operand:SI 4 "some_operand" "rIOKL")))]
+  "reload_in_progress"
+  "#")
+
+(define_split
+  [(set (match_operand:SI 0 "register_operand" "r")
+       (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
+                                  (match_operand:SI 2 "const48_operand" ""))
+                         (match_operand:SI 3 "register_operand" ""))
+                (match_operand:SI 4 "add_operand" "rIOKL")))]
+  "reload_completed"
+  [(set (match_dup 0)
+       (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3)))
+   (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
+  "")
+
+(define_insn ""
+  [(set (match_operand:DI 0 "some_operand" "=&r")
+       (sign_extend:DI
+        (plus:SI (plus:SI
+                  (mult:SI (match_operand:SI 1 "some_operand" "rJ")
+                           (match_operand:SI 2 "const48_operand" "I"))
+                  (match_operand:SI 3 "some_operand" "r"))
+                 (match_operand:SI 4 "some_operand" "rIOKL"))))]
+  "reload_in_progress"
+  "#")
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+       (sign_extend:DI
+        (plus:SI (plus:SI
+                  (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
+                           (match_operand:SI 2 "const48_operand" ""))
+                  (match_operand:SI 3 "register_operand" ""))
+                 (match_operand:SI 4 "add_operand" ""))))]
+  "reload_completed"
+  [(set (match_dup 5)
+       (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3)))
+   (set (match_dup 0) (sign_extend:DI (plus:SI (match_dup 5) (match_dup 4))))]
+  "operands[5] = gen_lowpart (SImode, operands[0]);")
+
+(define_insn ""
+  [(set (match_operand:DI 0 "some_operand" "=&r")
+       (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ")
+                                  (match_operand:DI 2 "const48_operand" "I"))
+                         (match_operand:DI 3 "some_operand" "r"))
+                (match_operand:DI 4 "some_operand" "rIOKL")))]
+  "reload_in_progress"
+  "#")
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "=")
+       (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "")
+                                  (match_operand:DI 2 "const48_operand" ""))
+                         (match_operand:DI 3 "register_operand" ""))
+                (match_operand:DI 4 "add_operand" "")))]
+  "reload_completed"
+  [(set (match_dup 0)
+       (plus:DI (mult:DI (match_dup 1) (match_dup 2)) (match_dup 3)))
+   (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 4)))]
+  "")
+
 (define_insn "negsi2"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (neg:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))]