IVGCVSW-3353 Add CL support and tests for SpaceToDepth
authorJames Conroy <james.conroy@arm.com>
Mon, 1 Jul 2019 16:12:40 +0000 (17:12 +0100)
committerJames Conroy <james.conroy@arm.com>
Fri, 5 Jul 2019 16:02:24 +0000 (17:02 +0100)
 * Added CL backend support for SpaceToDepth.
 * Enabled unit tests for SpaceToDepth on CL.
 * Renamed unit tests to make them type-agnostic.
 * Added QSymm16/S16 support to ClTensorHandle.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I417d82946142ed619c447428bf0b0c4a2116c004

17 files changed:
src/backends/backendsCommon/WorkloadData.cpp
src/backends/backendsCommon/test/LayerTests.cpp
src/backends/backendsCommon/test/LayerTests.hpp
src/backends/backendsCommon/test/SpaceToDepthTestImpl.hpp
src/backends/cl/ClLayerSupport.cpp
src/backends/cl/ClLayerSupport.hpp
src/backends/cl/ClTensorHandle.hpp
src/backends/cl/ClWorkloadFactory.cpp
src/backends/cl/ClWorkloadFactory.hpp
src/backends/cl/backend.mk
src/backends/cl/test/ClLayerTests.cpp
src/backends/cl/workloads/CMakeLists.txt
src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp [new file with mode: 0644]
src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp [new file with mode: 0644]
src/backends/cl/workloads/ClWorkloads.hpp
src/backends/reference/RefLayerSupport.cpp
src/backends/reference/test/RefLayerTests.cpp

index 3766f5f..324c1de 100644 (file)
@@ -1206,7 +1206,8 @@ void SpaceToDepthQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) con
     {
         DataType::Float32,
         DataType::Float16,
-        DataType::QuantisedAsymm8
+        DataType::QuantisedAsymm8,
+        DataType::QuantisedSymm16
     };
 
     ValidateDataTypes(workloadInfo.m_InputTensorInfos[0],
index 56c0ab6..5c41d3a 100644 (file)
@@ -9421,7 +9421,7 @@ LayerTestResult<uint8_t, 4> SpaceToDepthNHWCAsymmQ8Test(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
 {
-    return SpaceToDepthSimpleTest<armnn::DataType::QuantisedAsymm8>(
+    return SpaceToDepthSimpleTest1<armnn::DataType::QuantisedAsymm8>(
         workloadFactory,
         memoryManager);
 }
@@ -9430,26 +9430,64 @@ LayerTestResult<uint8_t, 4> SpaceToDepthNCHWAsymmQ8Test(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
 {
-    return SpaceToDepthSimpleTest<armnn::DataType::QuantisedAsymm8>(
+    return SpaceToDepthSimpleTest1<armnn::DataType::QuantisedAsymm8>(
         workloadFactory,
         memoryManager,
         armnn::DataLayout::NCHW);
 }
 
-LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test(
+LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test1(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
 {
-    return SpaceToDepthFloatTest<armnn::DataType::Float32>(
+    return SpaceToDepthSimpleTest1<armnn::DataType::Float32>(
         workloadFactory,
         memoryManager);
 }
 
-LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test(
+LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test1(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
 {
-    return SpaceToDepthFloatTest<armnn::DataType::Float32>(
+    return SpaceToDepthSimpleTest1<armnn::DataType::Float32>(
+        workloadFactory,
+        memoryManager,
+        armnn::DataLayout::NCHW);
+}
+
+LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test2(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
+{
+    return SpaceToDepthSimpleTest2<armnn::DataType::Float32>(
+        workloadFactory,
+        memoryManager);
+}
+
+LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test2(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
+{
+    return SpaceToDepthSimpleTest2<armnn::DataType::Float32>(
+        workloadFactory,
+        memoryManager,
+        armnn::DataLayout::NCHW);
+}
+
+LayerTestResult<int16_t, 4> SpaceToDepthNHWCQSymm16Test(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
+{
+    return SpaceToDepthSimpleTest2<armnn::DataType::QuantisedSymm16>(
+        workloadFactory,
+        memoryManager);
+}
+
+LayerTestResult<int16_t, 4> SpaceToDepthNCHWQSymm16Test(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
+{
+    return SpaceToDepthSimpleTest2<armnn::DataType::QuantisedSymm16>(
         workloadFactory,
         memoryManager,
         armnn::DataLayout::NCHW);
index 259ad01..c3ea619 100644 (file)
@@ -2004,11 +2004,27 @@ LayerTestResult<uint8_t, 4> SpaceToDepthNHWCAsymmQ8Test(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
 
-LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test(
+LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test1(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
 
-LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test(
+LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test1(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
+
+LayerTestResult<float, 4> SpaceToDepthNHWCFloat32Test2(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
+
+LayerTestResult<float, 4> SpaceToDepthNCHWFloat32Test2(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
+
+LayerTestResult<int16_t, 4> SpaceToDepthNHWCQSymm16Test(
+    armnn::IWorkloadFactory& workloadFactory,
+    const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
+
+LayerTestResult<int16_t, 4> SpaceToDepthNCHWQSymm16Test(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager);
 
index 99926cd..af3f5d2 100644 (file)
@@ -81,7 +81,7 @@ LayerTestResult<T, 4> SpaceToDepthTestImpl(
 }
 
 template<armnn::DataType ArmnnType, typename T = armnn::ResolveType<ArmnnType>>
-LayerTestResult<T, 4> SpaceToDepthSimpleTest(
+LayerTestResult<T, 4> SpaceToDepthSimpleTest1(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
     armnn::DataLayout dataLayout = armnn::DataLayout::NHWC)
@@ -114,7 +114,7 @@ LayerTestResult<T, 4> SpaceToDepthSimpleTest(
 }
 
 template<armnn::DataType ArmnnType, typename T = armnn::ResolveType<ArmnnType>>
-LayerTestResult<T, 4> SpaceToDepthFloatTest(
+LayerTestResult<T, 4> SpaceToDepthSimpleTest2(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
     armnn::DataLayout dataLayout = armnn::DataLayout::NHWC)
index a6baa3c..497a643 100644 (file)
@@ -43,6 +43,7 @@
 #include "workloads/ClQuantizeWorkload.hpp"
 #include "workloads/ClSoftmaxBaseWorkload.hpp"
 #include "workloads/ClSpaceToBatchNdWorkload.hpp"
+#include "workloads/ClSpaceToDepthWorkload.hpp"
 #include "workloads/ClSplitterWorkload.hpp"
 #include "workloads/ClStridedSliceWorkload.hpp"
 #include "workloads/ClSubtractionWorkload.hpp"
@@ -650,6 +651,18 @@ bool ClLayerSupport::IsSpaceToBatchNdSupported(const TensorInfo& input,
                                    descriptor);
 }
 
+bool ClLayerSupport::IsSpaceToDepthSupported(const TensorInfo& input,
+                                             const TensorInfo& output,
+                                             const SpaceToDepthDescriptor& descriptor,
+                                             Optional<std::string&> reasonIfUnsupported) const
+{
+    FORWARD_WORKLOAD_VALIDATE_FUNC(ClSpaceToDepthWorkloadValidate,
+                                   reasonIfUnsupported,
+                                   input,
+                                   output,
+                                   descriptor);
+}
+
 bool ClLayerSupport::IsSplitterSupported(const TensorInfo& input,
                                          const ViewsDescriptor& descriptor,
                                          Optional<std::string&> reasonIfUnsupported) const
index f77889b..4a55997 100644 (file)
@@ -223,6 +223,11 @@ public:
                                    const SpaceToBatchNdDescriptor& descriptor,
                                    Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
 
+    bool IsSpaceToDepthSupported(const TensorInfo& input,
+                                 const TensorInfo& output,
+                                 const SpaceToDepthDescriptor& descriptor,
+                                 Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+
     ARMNN_DEPRECATED_MSG("Use IsSplitterSupported with outputs instead")
     bool IsSplitterSupported(const TensorInfo& input,
                              const ViewsDescriptor& descriptor,
index f09fb02..d08b79f 100644 (file)
@@ -105,6 +105,11 @@ private:
                 armcomputetensorutils::CopyArmComputeITensorData(this->GetTensor(),
                                                                  static_cast<armnn::Half*>(memory));
                 break;
+            case arm_compute::DataType::S16:
+            case arm_compute::DataType::QSYMM16:
+                armcomputetensorutils::CopyArmComputeITensorData(this->GetTensor(),
+                                                                 static_cast<int16_t*>(memory));
+                break;
             default:
             {
                 throw armnn::UnimplementedException();
@@ -132,6 +137,11 @@ private:
                 armcomputetensorutils::CopyArmComputeITensorData(static_cast<const armnn::Half*>(memory),
                                                                  this->GetTensor());
                 break;
+            case arm_compute::DataType::S16:
+            case arm_compute::DataType::QSYMM16:
+                armcomputetensorutils::CopyArmComputeITensorData(static_cast<const int16_t*>(memory),
+                                                                 this->GetTensor());
+                break;
             default:
             {
                 throw armnn::UnimplementedException();
@@ -207,6 +217,11 @@ private:
                 armcomputetensorutils::CopyArmComputeITensorData(this->GetTensor(),
                                                                  static_cast<armnn::Half*>(memory));
                 break;
+            case arm_compute::DataType::S16:
+            case arm_compute::DataType::QSYMM16:
+                armcomputetensorutils::CopyArmComputeITensorData(this->GetTensor(),
+                                                                 static_cast<int16_t*>(memory));
+                break;
             default:
             {
                 throw armnn::UnimplementedException();
@@ -234,6 +249,11 @@ private:
                 armcomputetensorutils::CopyArmComputeITensorData(static_cast<const armnn::Half*>(memory),
                                                                  this->GetTensor());
                 break;
+            case arm_compute::DataType::S16:
+            case arm_compute::DataType::QSYMM16:
+                armcomputetensorutils::CopyArmComputeITensorData(static_cast<const int16_t*>(memory),
+                                                                 this->GetTensor());
+                break;
             default:
             {
                 throw armnn::UnimplementedException();
index 307f954..506acb4 100644 (file)
@@ -431,4 +431,10 @@ std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateTransposeConvolution2
     return MakeWorkload<ClTransposeConvolution2dWorkload>(descriptor, info, m_MemoryManager->GetIntraLayerManager());
 }
 
+std::unique_ptr<IWorkload> ClWorkloadFactory::CreateSpaceToDepth(const SpaceToDepthQueueDescriptor& descriptor,
+                                                                 const WorkloadInfo& info) const
+{
+    return MakeWorkload<ClSpaceToDepthWorkload>(descriptor, info);
+}
+
 } // namespace armnn
index 5448504..3b0ac82 100644 (file)
@@ -179,6 +179,9 @@ public:
     std::unique_ptr<IWorkload> CreateTransposeConvolution2d(const TransposeConvolution2dQueueDescriptor& descriptor,
                                                             const WorkloadInfo& info) const override;
 
+    std::unique_ptr<IWorkload> CreateSpaceToDepth(const SpaceToDepthQueueDescriptor& descriptor,
+                                                  const WorkloadInfo& info) const override;
+
 private:
     template<typename FloatWorkload, typename Uint8Workload, typename QueueDescriptorType, typename... Args>
     static std::unique_ptr<IWorkload> MakeWorkload(const QueueDescriptorType& descriptor,
index 87964cd..1bc1fb3 100644 (file)
@@ -53,6 +53,7 @@ BACKEND_SOURCES := \
         workloads/ClSoftmaxFloatWorkload.cpp \
         workloads/ClSoftmaxUint8Workload.cpp \
         workloads/ClSpaceToBatchNdWorkload.cpp \
+        workloads/ClSpaceToDepthWorkload.cpp \
         workloads/ClSplitterWorkload.cpp \
         workloads/ClStridedSliceWorkload.cpp \
         workloads/ClSubtractionWorkload.cpp \
index 9ac244e..20eb413 100644 (file)
@@ -432,6 +432,19 @@ ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsNHWCUint8, SpaceToBatchNdMultiCh
 ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockNHWCUint8, SpaceToBatchNdMultiBlockNHWCUint8Test)
 ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingNHWCUint8, SpaceToBatchNdPaddingNHWCUint8Test)
 
+// Space To Depth
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHWAsymmQ8, SpaceToDepthNCHWAsymmQ8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWCAsymmQ8, SpaceToDepthNHWCAsymmQ8Test)
+
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWC1Float32, SpaceToDepthNHWCFloat32Test1)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHW1Float32, SpaceToDepthNCHWFloat32Test1)
+
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWC2Float32, SpaceToDepthNHWCFloat32Test2)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHW2Float32, SpaceToDepthNCHWFloat32Test2)
+
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWCQSymm16, SpaceToDepthNHWCQSymm16Test)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHWQSymm16, SpaceToDepthNCHWQSymm16Test)
+
 // Strided Slice
 ARMNN_AUTO_TEST_CASE(StridedSlice4DFloat32, StridedSlice4DFloat32Test)
 ARMNN_AUTO_TEST_CASE(StridedSlice4DReverseFloat32, StridedSlice4DReverseFloat32Test)
index 40c5f76..d98956f 100644 (file)
@@ -70,6 +70,8 @@ list(APPEND armnnClBackendWorkloads_sources
     ClSoftmaxUint8Workload.hpp
     ClSpaceToBatchNdWorkload.hpp
     ClSpaceToBatchNdWorkload.cpp
+    ClSpaceToDepthWorkload.cpp
+    ClSpaceToDepthWorkload.hpp
     ClSplitterWorkload.cpp
     ClSplitterWorkload.hpp
     ClStridedSliceWorkload.cpp
diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp
new file mode 100644 (file)
index 0000000..d541e4e
--- /dev/null
@@ -0,0 +1,61 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClSpaceToDepthWorkload.hpp"
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeUtils.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <backendsCommon/CpuTensorHandle.hpp>
+#include <cl/ClTensorHandle.hpp>
+#include <boost/polymorphic_pointer_cast.hpp>
+
+namespace armnn
+{
+using namespace armcomputetensorutils;
+
+ClSpaceToDepthWorkload::ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& desc,
+                                               const WorkloadInfo& info)
+    : BaseWorkload<SpaceToDepthQueueDescriptor>(desc, info)
+{
+    m_Data.ValidateInputsOutputs("ClSpaceToDepthWorkload", 1, 1);
+
+    arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
+
+    arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    input.info()->set_data_layout(aclDataLayout);
+
+    int32_t blockSize = boost::numeric_cast<int32_t>(desc.m_Parameters.m_BlockSize);
+
+    arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+    output.info()->set_data_layout(aclDataLayout);
+
+    m_Layer.configure(&input, &output, blockSize);
+}
+
+void ClSpaceToDepthWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClSpaceToDepthWorkload_Execute");
+    RunClFunction(m_Layer, CHECK_LOCATION());
+}
+
+arm_compute::Status ClSpaceToDepthWorkloadValidate(const TensorInfo& input,
+                                                   const TensorInfo& output,
+                                                   const SpaceToDepthDescriptor& desc)
+{
+    DataLayout dataLayout = desc.m_DataLayout;
+    const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
+
+    int32_t blockSize = boost::numeric_cast<int32_t>(desc.m_BlockSize);
+
+    const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
+
+    const arm_compute::Status aclStatus = arm_compute::CLSpaceToDepthLayer::validate(&aclInputInfo,
+                                                                                     &aclOutputInfo,
+                                                                                     blockSize);
+    return aclStatus;
+}
+
+} //namespace armnn
diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp
new file mode 100644 (file)
index 0000000..57ce5d4
--- /dev/null
@@ -0,0 +1,29 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/Descriptors.hpp>
+
+#include <backendsCommon/Workload.hpp>
+#include <arm_compute/runtime/CL/functions/CLSpaceToDepthLayer.h>
+
+namespace armnn
+{
+arm_compute::Status ClSpaceToDepthWorkloadValidate(const TensorInfo& input,
+                                                   const TensorInfo& output,
+                                                   const SpaceToDepthDescriptor& desc);
+
+class ClSpaceToDepthWorkload : public BaseWorkload<SpaceToDepthQueueDescriptor>
+{
+public:
+    ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, const WorkloadInfo& info);
+    void Execute() const override;
+
+private:
+    mutable arm_compute::CLSpaceToDepthLayer m_Layer;
+};
+
+} //namespace armnn
index 6ba8138..256b68c 100644 (file)
@@ -34,6 +34,7 @@
 #include "ClSoftmaxFloatWorkload.hpp"
 #include "ClSoftmaxUint8Workload.hpp"
 #include "ClSpaceToBatchNdWorkload.hpp"
+#include "ClSpaceToDepthWorkload.hpp"
 #include "ClSplitterWorkload.hpp"
 #include "ClStridedSliceWorkload.hpp"
 #include "ClSubtractionWorkload.hpp"
index 26070a5..ae668f3 100644 (file)
@@ -1457,10 +1457,11 @@ bool RefLayerSupport::IsSpaceToDepthSupported(const TensorInfo& input,
     ignore_unused(descriptor);
     bool supported = true;
 
-    std::array<DataType,2> supportedTypes =
+    std::array<DataType,3> supportedTypes =
     {
         DataType::Float32,
         DataType::QuantisedAsymm8,
+        DataType::QuantisedSymm16
     };
 
     supported &= CheckSupportRule(TypeAnyOf(input, supportedTypes), reasonIfUnsupported,
index 9f89c8c..e978f42 100644 (file)
@@ -974,8 +974,14 @@ ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNchwQsymm16_7,  BatchToSpaceNdNchwTest7<armnn
 ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHWAsymmQ8, SpaceToDepthNCHWAsymmQ8Test)
 ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWCAsymmQ8, SpaceToDepthNHWCAsymmQ8Test)
 
-ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWCFloat32, SpaceToDepthNHWCFloat32Test)
-ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHWFloat32, SpaceToDepthNCHWFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWC1Float32, SpaceToDepthNHWCFloat32Test1)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHW1Float32, SpaceToDepthNCHWFloat32Test1)
+
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWC2Float32, SpaceToDepthNHWCFloat32Test2)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHW2Float32, SpaceToDepthNCHWFloat32Test2)
+
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNHWCQSymm16, SpaceToDepthNHWCQSymm16Test)
+ARMNN_AUTO_TEST_CASE(SpaceToDepthNCHWQSymm16, SpaceToDepthNCHWQSymm16Test)
 
 // Strided Slice
 ARMNN_AUTO_TEST_CASE(StridedSlice4DFloat32, StridedSlice4DFloat32Test)