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v3dv: assert that only tex instructions with sampler state have a sampler src
author
Iago Toral Quiroga
<itoral@igalia.com>
Mon, 7 Aug 2023 11:23:00 +0000
(13:23 +0200)
committer
Marge Bot
<emma+marge@anholt.net>
Thu, 10 Aug 2023 07:10:01 +0000
(07:10 +0000)
Reviewed-by: Alejandro PiƱeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
src/broadcom/vulkan/v3dv_pipeline.c
patch
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diff --git
a/src/broadcom/vulkan/v3dv_pipeline.c
b/src/broadcom/vulkan/v3dv_pipeline.c
index
28e89e7
..
b7b164a
100644
(file)
--- a/
src/broadcom/vulkan/v3dv_pipeline.c
+++ b/
src/broadcom/vulkan/v3dv_pipeline.c
@@
-712,8
+712,10
@@
lower_sampler(nir_builder *b,
int sampler_idx =
nir_tex_instr_src_index(instr, nir_tex_src_sampler_deref);
- if (sampler_idx >= 0)
+ if (sampler_idx >= 0) {
+ assert(nir_tex_instr_need_sampler(instr));
lower_tex_src(b, instr, sampler_idx, state);
+ }
if (texture_idx < 0 && sampler_idx < 0)
return false;