radeonsi/gfx11: remove the INST_PREF_SIZE workaround
authorMarek Olšák <marek.olsak@amd.com>
Tue, 24 Jan 2023 02:29:37 +0000 (21:29 -0500)
committerMarge Bot <emma+marge@anholt.net>
Fri, 3 Feb 2023 00:18:01 +0000 (00:18 +0000)
The hw does the right thing automatically. (i.e. enables or disables
the feature)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>

src/gallium/drivers/radeonsi/si_state_shaders.cpp

index 1fc74e0..72527ec 100644 (file)
@@ -671,13 +671,6 @@ static unsigned si_get_vs_vgpr_comp_cnt(struct si_screen *sscreen, struct si_sha
 
 unsigned si_get_shader_prefetch_size(struct si_shader *shader)
 {
-   /* Return 0 for some A0 chips only. Other chips don't need it. */
-   if ((shader->selector->screen->info.family == CHIP_GFX1100 ||
-        shader->selector->screen->info.family == CHIP_GFX1102 ||
-        shader->selector->screen->info.family == CHIP_GFX1103_R1) &&
-       shader->selector->screen->info.chip_rev == 0)
-      return 0;
-
    /* inst_pref_size is calculated in cache line size granularity */
    assert(!(shader->bo->b.b.width0 & 0x7f));
    return MIN2(shader->bo->b.b.width0, 8064) / 128;