static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
- u8 data[2];
+ u16 data;
- data[0] = (reg << 1) | ((value >> 8) & 0x0001);
- data[1] = value & 0x00ff;
+ data = cpu_to_be16((reg << 9) | (value & 0x1ff));
- return do_hw_write(codec, reg, value, data, 2);
+ return do_hw_write(codec, reg, value, &data, 2);
}
- #if defined(CONFIG_SPI_MASTER)
- static int snd_soc_7_9_spi_write(void *control_data, const char *data,
- int len)
- {
- u8 msg[2];
-
- msg[0] = data[0];
- msg[1] = data[1];
-
- return do_spi_write(control_data, msg, len);
- }
- #else
- #define snd_soc_7_9_spi_write NULL
- #endif
-
static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
unsigned int value)
{
u8 data[3];
+ u16 rval = cpu_to_be16(reg);
- data[0] = (reg >> 8) & 0xff;
- data[1] = reg & 0xff;
+ memcpy(data, &rval, sizeof(rval));
data[2] = value;
- reg &= 0xff;
return do_hw_write(codec, reg, value, data, 3);
}
static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
- u8 data[4];
+ u16 data[2];
- data[0] = (reg >> 8) & 0xff;
- data[1] = reg & 0xff;
- data[2] = (value >> 8) & 0xff;
- data[3] = value & 0xff;
+ data[0] = cpu_to_be16(reg);
+ data[1] = cpu_to_be16(value);
- return do_hw_write(codec, reg, value, data, 4);
+ return do_hw_write(codec, reg, value, data, sizeof(data));
}
- #if defined(CONFIG_SPI_MASTER)
- static int snd_soc_16_16_spi_write(void *control_data, const char *data,
- int len)
- {
- u8 msg[4];
-
- msg[0] = data[0];
- msg[1] = data[1];
- msg[2] = data[2];
- msg[3] = data[3];
-
- return do_spi_write(control_data, msg, len);
- }
- #else
- #define snd_soc_16_16_spi_write NULL
- #endif
-
/* Primitive bulk write support for soc-cache. The data pointed to by
* `data' needs to already be in the form the hardware expects
* including any leading register specific data. Any data written