amvecm: fix the jitter while disabling CM [1/1]
authorXihai Zhu <xihai.zhu@amlogic.com>
Tue, 18 Jun 2019 07:30:09 +0000 (03:30 -0400)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 24 Jun 2019 04:38:12 +0000 (21:38 -0700)
PD#TV-6869

Problem:
screen jitter while disabling CM

Solution:
using RDMA method to program related registers

Verify:
TL1

Change-Id: I23e947093034107c69b2dc47483d562c95764a44
Signed-off-by: Xihai Zhu <xihai.zhu@amlogic.com>
drivers/amlogic/media/enhancement/amvecm/amcm.c

index 25d5821..ef12ff7 100644 (file)
@@ -179,16 +179,16 @@ void am_set_regmap(struct am_regs_s *p)
                                        cm_dis_flag = true;
                        }
 
-                       WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                        p->am_reg[i].addr);
                        if (p->am_reg[i].mask == 0xffffffff)
-                               WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                               VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                                p->am_reg[i].val);
                        else {
-                               temp = READ_VPP_REG(VPP_CHROMA_DATA_PORT);
-                               WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                               temp = VSYNC_RD_MPEG_REG(VPP_CHROMA_DATA_PORT);
+                               VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                                p->am_reg[i].addr);
-                               WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                               VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                        (temp & (~(p->am_reg[i].mask))) |
                                        (p->am_reg[i].val & p->am_reg[i].mask));
                        }
@@ -290,16 +290,16 @@ void amcm_disable(void)
        temp = READ_VPP_REG(VPP_CHROMA_DATA_PORT);
        if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) {
                if (temp & 0x1) {
-                       WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                0x208);
-                       WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                temp & 0xfffffffe);
                }
        } else {
                if (temp & 0x2) {
-                       WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                0x208);
-                       WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                temp & 0xfffffffd);
                }
        }
@@ -316,16 +316,16 @@ void amcm_enable(void)
        temp = READ_VPP_REG(VPP_CHROMA_DATA_PORT);
        if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) {
                if (!(temp & 0x1)) {
-                       WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                0x208);
-                       WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                temp | 0x1);
                }
        } else {
                if (!(temp & 0x2)) {
-                       WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_ADDR_PORT,
                                0x208);
-                       WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
+                       VSYNC_WR_MPEG_REG(VPP_CHROMA_DATA_PORT,
                                temp | 0x2);
                }
        }