drm/amd/display: Unify psr feature flags

[Why]
As it stands, psr has feature flags in dm, stream, and link. Most are
not defined well enough, and different dm layers have different uses for
these same flags.

[How]
We define a new structure called psr_settings in dc_link that will hold
the following psr feature flags:

psr_feature_enable - psr is supported
psr_allow_active - psr is currently active
psr_version - internal psr version supported
psr_frame_capture_indication_req
psr_sdp_transmit_line_num_deadline
The last two flags were moved out of the power module
for the purposes of consolidating psr flags.
Their use is already well-defined.

Psr caps reported by sink will also be stored in dc_link,
in dpcd_caps.psr_caps.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 504e369..28b18cb 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4330,14 +4330,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
 
        if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)
                mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket, false, false);
-       if (stream->link->psr_feature_enabled)  {
+       if (stream->link->psr_settings.psr_feature_enabled)     {
                struct dc  *core_dc = stream->link->ctx->dc;
 
                if (dc_is_dmcu_initialized(core_dc)) {
-                       struct dmcu *dmcu = core_dc->res_pool->dmcu;
-
-                       stream->psr_version = dmcu->dmcu_version.psr_version;
-
                        //
                        // should decide stream support vsc sdp colorimetry capability
                        // before building vsc info packet
@@ -6824,7 +6820,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                }
                mutex_lock(&dm->dc_lock);
                if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&
-                               acrtc_state->stream->link->psr_allow_active)
+                               acrtc_state->stream->link->psr_settings.psr_allow_active)
                        amdgpu_dm_psr_disable(acrtc_state->stream);
 
                dc_commit_updates_for_stream(dm->dc,
@@ -6835,12 +6831,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                                                     dc_state);
 
                if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&
-                                               acrtc_state->stream->psr_version &&
-                                               !acrtc_state->stream->link->psr_feature_enabled)
+                               acrtc_state->stream->link->psr_settings.psr_version != PSR_VERSION_UNSUPPORTED &&
+                               !acrtc_state->stream->link->psr_settings.psr_feature_enabled)
                        amdgpu_dm_link_setup_psr(acrtc_state->stream);
                else if ((acrtc_state->update_type == UPDATE_TYPE_FAST) &&
-                                               acrtc_state->stream->link->psr_feature_enabled &&
-                                               !acrtc_state->stream->link->psr_allow_active) {
+                               acrtc_state->stream->link->psr_settings.psr_feature_enabled &&
+                               !acrtc_state->stream->link->psr_settings.psr_allow_active) {
                        amdgpu_dm_psr_enable(acrtc_state->stream);
                }
 
@@ -7154,7 +7150,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
                        DRM_DEBUG_DRIVER("Atomic commit: RESET. crtc id %d:[%p]\n", acrtc->crtc_id, acrtc);
                        /* i.e. reset mode */
                        if (dm_old_crtc_state->stream) {
-                               if (dm_old_crtc_state->stream->link->psr_allow_active)
+                               if (dm_old_crtc_state->stream->link->psr_settings.psr_allow_active)
                                        amdgpu_dm_psr_disable(dm_old_crtc_state->stream);
 
                                remove_stream(adev, acrtc, dm_old_crtc_state->stream);
@@ -8603,8 +8599,17 @@ static void amdgpu_dm_set_psr_caps(struct dc_link *link)
                return;
        if (dm_helpers_dp_read_dpcd(NULL, link, DP_PSR_SUPPORT,
                                        dpcd_data, sizeof(dpcd_data))) {
-               link->psr_feature_enabled = dpcd_data[0] ? true:false;
-               DRM_INFO("PSR support:%d\n", link->psr_feature_enabled);
+               link->dpcd_caps.psr_caps.psr_version = dpcd_data[0];
+
+               if (dpcd_data[0] == 0) {
+                       link->psr_settings.psr_version = PSR_VERSION_UNSUPPORTED;
+                       link->psr_settings.psr_feature_enabled = false;
+               } else {
+                       link->psr_settings.psr_version = PSR_VERSION_1;
+                       link->psr_settings.psr_feature_enabled = true;
+               }
+
+               DRM_INFO("PSR support:%d\n", link->psr_settings.psr_feature_enabled);
        }
 }
 
@@ -8628,7 +8633,7 @@ static bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream)
        link = stream->link;
        dc = link->ctx->dc;
 
-       psr_config.psr_version = dc->res_pool->dmcu->dmcu_version.psr_version;
+       psr_config.psr_version = link->dpcd_caps.psr_caps.psr_version;
 
        if (psr_config.psr_version > 0) {
                psr_config.psr_exit_link_training_required = 0x1;
@@ -8640,7 +8645,7 @@ static bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream)
                ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);
 
        }
-       DRM_DEBUG_DRIVER("PSR link: %d\n",      link->psr_feature_enabled);
+       DRM_DEBUG_DRIVER("PSR link: %d\n",      link->psr_settings.psr_feature_enabled);
 
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index 8ec2dfe..a5c2114 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -90,7 +90,7 @@ void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_m
                dc->hwss.exit_optimized_pwr_state(dc, dc->current_state);
 
        if (edp_link) {
-               clk_mgr->psr_allow_active_cache = edp_link->psr_allow_active;
+               clk_mgr->psr_allow_active_cache = edp_link->psr_settings.psr_allow_active;
                dc_link_set_psr_allow_active(edp_link, false, false);
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 8489f1e..9bde055 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -66,6 +66,8 @@
 
 #include "dce/dce_i2c.h"
 
+#include "dmub/inc/dmub_cmd_dal.h"
+
 #define CTX \
        dc->ctx
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index ef81842..44b8efa 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -46,6 +46,7 @@
 #include "dmcu.h"
 #include "hw/clk_mgr.h"
 #include "dce/dmub_psr.h"
+#include "dmub/inc/dmub_cmd_dal.h"
 
 #define DC_LOGGER_INIT(logger)
 
@@ -1529,6 +1530,8 @@ static bool dc_link_construct(struct dc_link *link,
         */
        program_hpd_filter(link);
 
+       link->psr_settings.psr_version = PSR_VERSION_UNSUPPORTED;
+
        return true;
 device_tag_fail:
        link->link_enc->funcs->destroy(&link->link_enc);
@@ -2521,12 +2524,12 @@ bool dc_link_set_psr_allow_active(struct dc_link *link, bool allow_active, bool
        struct dmcu *dmcu = dc->res_pool->dmcu;
        struct dmub_psr *psr = dc->res_pool->psr;
 
-       if (psr != NULL && link->psr_feature_enabled)
+       if (psr != NULL && link->psr_settings.psr_feature_enabled)
                psr->funcs->psr_enable(psr, allow_active);
-       else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_feature_enabled)
+       else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_settings.psr_feature_enabled)
                dmcu->funcs->set_psr_enable(dmcu, allow_active, wait);
 
-       link->psr_allow_active = allow_active;
+       link->psr_settings.psr_allow_active = allow_active;
 
        return true;
 }
@@ -2537,9 +2540,9 @@ bool dc_link_get_psr_state(const struct dc_link *link, uint32_t *psr_state)
        struct dmcu *dmcu = dc->res_pool->dmcu;
        struct dmub_psr *psr = dc->res_pool->psr;
 
-       if (psr != NULL && link->psr_feature_enabled)
+       if (psr != NULL && link->psr_settings.psr_feature_enabled)
                psr->funcs->psr_get_state(psr, psr_state);
-       else if (dmcu != NULL && link->psr_feature_enabled)
+       else if (dmcu != NULL && link->psr_settings.psr_feature_enabled)
                dmcu->funcs->get_psr_state(dmcu, psr_state);
 
        return true;
@@ -2710,14 +2713,14 @@ bool dc_link_setup_psr(struct dc_link *link,
        psr_context->frame_delay = 0;
 
        if (psr)
-               link->psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context);
+               link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context);
        else
-               link->psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);
+               link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);
 
        /* psr_enabled == 0 indicates setup_psr did not succeed, but this
         * should not happen since firmware should be running at this point
         */
-       if (link->psr_feature_enabled == 0)
+       if (link->psr_settings.psr_feature_enabled == 0)
                ASSERT(0);
 
        return true;

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 74cf06a..3408c36 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2417,7 +2417,7 @@ static bool handle_hpd_irq_psr_sink(struct dc_link *link)
 {
        union dpcd_psr_configuration psr_configuration;
 
-       if (!link->psr_feature_enabled)
+       if (!link->psr_settings.psr_feature_enabled)
                return false;
 
        dm_helpers_dp_read_dpcd(

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 8560032..1b30804 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -990,6 +990,7 @@ struct dpcd_caps {
        union dpcd_fec_capability fec_cap;
        struct dpcd_dsc_capabilities dsc_caps;
        struct dc_lttpr_caps lttpr_caps;
+       struct psr_caps psr_caps;
 
 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index bb2730e..af177c0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -740,5 +740,11 @@ struct dpcd_dsc_capabilities {
        union dpcd_dsc_ext_capabilities dsc_ext_caps;
 };
 
+/* These parameters are from PSR capabilities reported by Sink DPCD */
+struct psr_caps {
+       unsigned char psr_version;
+       unsigned int psr_rfb_setup_time;
+       bool psr_exit_link_training_required;
+};
 
 #endif /* DC_DP_TYPES_H */

diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h
index e131dc9..34c6527 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -29,6 +29,7 @@
 #include "dc.h"
 #include "dc_types.h"
 #include "grph_object_defs.h"
+#include "dmub/inc/dmub_cmd_dal.h"
 
 enum dc_link_fec_state {
        dc_link_fec_not_ready,
@@ -66,6 +67,22 @@ struct time_stamp {
 struct link_trace {
        struct time_stamp time_stamp;
 };
+
+/* PSR feature flags */
+struct psr_settings {
+       bool psr_feature_enabled;               // PSR is supported by sink
+       bool psr_allow_active;                  // PSR is currently active
+       enum psr_version psr_version;           // Internal PSR version, determined based on DPCD
+
+       /* These parameters are calculated in Driver,
+        * based on display timing and Sink capabilities.
+        * If VBLANK region is too small and Sink takes a long time
+        * to set up RFB, it may take an extra frame to enter PSR state.
+        */
+       bool psr_frame_capture_indication_req;
+       unsigned int psr_sdp_transmit_line_num_deadline;
+};
+
 /*
  * A link contains one or more sinks and their connected status.
  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
@@ -130,10 +147,10 @@ struct dc_link {
        struct hdcp_caps hdcp_caps;
 #endif
        enum edp_revision edp_revision;
-       bool psr_feature_enabled;
-       bool psr_allow_active;
        union dpcd_sink_ext_caps dpcd_sink_ext_caps;
 
+       struct psr_settings psr_settings;
+
        /* MST record stream using this link */
        struct link_flags {
                bool dp_keep_receiver_powered;

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index a5c7ef4..49aad69 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -167,8 +167,6 @@ struct dc_stream_state {
 
        /* TODO: custom INFO packets */
        /* TODO: ABM info (DMCU) */
-       /* PSR info */
-       unsigned char psr_version;
        /* TODO: CEA VIC */
 
        /* DMCU info */

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index 31a9b12..ccd40cf 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
@@ -53,16 +53,15 @@ static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *
        union dmub_rb_cmd cmd;
        struct dc_context *dc = dmub->ctx;
 
+       if (stream->link->psr_settings.psr_version == PSR_VERSION_UNSUPPORTED)
+               return false;
+
        cmd.psr_set_version.header.type = DMUB_CMD__PSR;
        cmd.psr_set_version.header.sub_type = DMUB_CMD__PSR_SET_VERSION;
+       cmd.psr_set_version.psr_set_version_data.version = stream->link->psr_settings.psr_version;
+       cmd.psr_set_version.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data);
 
-       if (stream->psr_version == 0x0) // Unsupported
-               return false;
-       else if (stream->psr_version == 0x1)
-               cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_1;
-       cmd.psr_enable.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data);
-
-       dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_enable.header);
+       dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_set_version.header);
        dc_dmub_srv_cmd_execute(dc->dmub_srv);
        dc_dmub_srv_wait_idle(dc->dmub_srv);
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index c279982..78240db 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1432,7 +1432,7 @@ static enum dc_status apply_single_controller_ctx_to_hw(
 
        pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;
 
-       pipe_ctx->stream->link->psr_feature_enabled = false;
+       pipe_ctx->stream->link->psr_settings.psr_feature_enabled = false;
 
        return DC_OK;
 }
@@ -1838,7 +1838,7 @@ static bool should_enable_fbc(struct dc *dc,
                return false;
 
        /* PSR should not be enabled */
-       if (pipe_ctx->stream->link->psr_feature_enabled)
+       if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled)
                return false;
 
        /* Nothing to compress */

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd_dal.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd_dal.h
index cb52eba..e42de9d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd_dal.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd_dal.h
@@ -41,6 +41,7 @@ enum dmub_cmd_psr_type {
 
 enum psr_version {
        PSR_VERSION_1                           = 0,
+       PSR_VERSION_UNSUPPORTED                 = 0xFFFFFFFF,
 };
 
 enum dmub_cmd_abm_type {

diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
index cff3ab1..22a5484 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
+++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
@@ -29,6 +29,7 @@
 #include "mod_shared.h"
 #include "mod_freesync.h"
 #include "dc.h"
+#include "dmub/inc/dmub_cmd_dal.h"
 
 enum vsc_packet_revision {
        vsc_packet_undefined = 0,
@@ -144,7 +145,7 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
        }
 
        /*VSC packet set to 2 when DP revision >= 1.2*/
-       if (stream->psr_version != 0)
+       if (stream->link->psr_settings.psr_version != PSR_VERSION_UNSUPPORTED)
                vsc_packet_revision = vsc_packet_rev2;
 
        /* Update to revision 5 for extended colorimetry support */