}
count = aper_size / 4096 * 2;
+ if (drmtest_run_in_simulation())
+ count = 10;
+
handles = malloc (count * sizeof(uint32_t));
assert(handles);
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
+ if (drmtest_run_in_simulation()) {
+ num_contexts = 2;
+ iter = 4;
+ }
+
parse(argc, argv);
threads = calloc(num_contexts, sizeof(*threads));
skipped_all = false;
- for (count = 1; count <= 1<<17; count <<= 1) {
+ for (count = 1; count <= SLOW_QUICK(1<<17, 1<<4); count <<= 1) {
struct timeval start, end;
gettimeofday(&start, NULL);
#include "i915_drm.h"
#include "drmtest.h"
-#define OBJECT_SIZE (16*1024*1024)
+static int OBJECT_SIZE = 16*1024*1024;
static void set_domain(int fd, uint32_t handle)
{
{
int fd;
+ if (drmtest_run_in_simulation())
+ OBJECT_SIZE = 1 * 1024 * 1024;
+
drmtest_subtest_init(argc, argv);
fd = drm_open_any();
uint32_t *buf;
drm_intel_bo *target_bo;
- for (i = 0; i < 0x10000; i++) {
+ for (i = 0; i < SLOW_QUICK(0x10000, 4); i++) {
/* we want to check tlb consistency of the pipe_control target,
* so get a new buffer every time around */
target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
count = 0;
+ if (drmtest_run_in_simulation())
+ count = 2;
if (argc > 1)
count = atoi(argv[1]);
+
if (count == 0)
count = 3 * gem_aperture_size(fd) / SIZE / 2;
else if (count < 2) {
for (i = 0; i < count; i++)
check_bo(fd, bo[i]->handle, start_val[i]);
+ if (drmtest_run_in_simulation())
+ return 0;
+
printf("Cyclic blits, backward...\n");
for (i = 0; i < count * 4; i++) {
struct scratch_buf src, dst;
srandom(0xdeadbeef);
- for (i = 0; i < 0x100000; i++) {
+ for (i = 0; i < SLOW_QUICK(0x100000, 10); i++) {
int ring = random() % num_rings + 1;
if (ring == I915_EXEC_RENDER) {
if (!has_ppgtt)
cmd |= MI_MEM_VIRTUAL;
- for (i = 0; i < SLOW_QUICK(0x80000, 0x10); i++) {
+ for (i = 0; i < SLOW_QUICK(0x80000, 4); i++) {
cmd_bo = drm_intel_bo_alloc(bufmgr, "cmd bo", 4096, 4096);
if (!cmd_bo) {
fprintf(stderr, "failed to alloc cmd bo\n");
store_dword_loop(1);
store_dword_loop(2);
- store_dword_loop(3);
- store_dword_loop(5);
+ if (!drmtest_run_in_simulation()) {
+ store_dword_loop(3);
+ store_dword_loop(5);
+ }
drm_intel_bo_unreference(target_bo);
drm_intel_bufmgr_destroy(bufmgr);
store_dword_loop(1);
store_dword_loop(2);
- store_dword_loop(3);
- store_dword_loop(5);
+ if (!drmtest_run_in_simulation()) {
+ store_dword_loop(3);
+ store_dword_loop(5);
+ }
drm_intel_bo_unreference(target_buffer);
intel_batchbuffer_free(batch);
store_dword_loop(1);
store_dword_loop(2);
- store_dword_loop(3);
- store_dword_loop(5);
+ if (!drmtest_run_in_simulation()) {
+ store_dword_loop(3);
+ store_dword_loop(5);
+ }
drm_intel_bo_unreference(target_buffer);
intel_batchbuffer_free(batch);
store_dword_loop(1);
store_dword_loop(2);
- store_dword_loop(3);
- store_dword_loop(5);
+ if (!drmtest_run_in_simulation()) {
+ store_dword_loop(3);
+ store_dword_loop(5);
+ }
drm_intel_bo_unreference(target_buffer);
intel_batchbuffer_free(batch);
for (i = 0; i < count; i++)
check_bo(bo[i], bo_start_val[i]);
+ if (drmtest_run_in_simulation())
+ return;
+
printf("Cyclic blits, backward...\n");
for (i = 0; i < count * 4; i++) {
int src = (i+1) % count;
fd = drm_open_any();
if (!drmtest_only_list_subtests()) {
+ if (drmtest_run_in_simulation())
+ count = 2;
if (argc > 1)
count = atoi(argv[1]);
if (count == 0) {