staging: rtl8188eu: remove a write-only power-index members
authorMartin Kaiser <martin@kaiser.cx>
Sat, 12 Jun 2021 18:00:17 +0000 (20:00 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 14 Jun 2021 14:46:56 +0000 (16:46 +0200)
Remove power index members of struct hal_data_8188e that are written to
but never read.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20210612180019.20387-4-martin@kaiser.cx
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8188eu/hal/phy.c
drivers/staging/rtl8188eu/include/rtl8188e_hal.h

index 5d9ad09..256f87b 100644 (file)
@@ -162,18 +162,6 @@ static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr,
        }
 }
 
-static void phy_power_index_check(struct adapter *adapt, u8 channel,
-                                 u8 *cck_pwr, u8 *ofdm_pwr, u8 *bw20_pwr,
-                                 u8 *bw40_pwr)
-{
-       struct hal_data_8188e *hal_data = adapt->HalData;
-
-       hal_data->CurrentCckTxPwrIdx = cck_pwr[0];
-       hal_data->CurrentOfdm24GTxPwrIdx = ofdm_pwr[0];
-       hal_data->CurrentBW2024GTxPwrIdx = bw20_pwr[0];
-       hal_data->CurrentBW4024GTxPwrIdx = bw40_pwr[0];
-}
-
 void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
 {
        u8 cck_pwr[MAX_TX_COUNT] = {0};
@@ -184,9 +172,6 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
        get_tx_power_index(adapt, channel, &cck_pwr[0], &ofdm_pwr[0],
                           &bw20_pwr[0], &bw40_pwr[0]);
 
-       phy_power_index_check(adapt, channel, &cck_pwr[0], &ofdm_pwr[0],
-                             &bw20_pwr[0], &bw40_pwr[0]);
-
        rtl88eu_phy_rf6052_set_cck_txpower(adapt, &cck_pwr[0]);
        rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, &ofdm_pwr[0], &bw20_pwr[0],
                                            &bw40_pwr[0], channel);
index 7b8ca0e..20049bd 100644 (file)
@@ -233,12 +233,6 @@ struct hal_data_8188e {
        u8      PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
        u8      PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
 
-       /*  The current Tx Power Level */
-       u8      CurrentCckTxPwrIdx;
-       u8      CurrentOfdm24GTxPwrIdx;
-       u8      CurrentBW2024GTxPwrIdx;
-       u8      CurrentBW4024GTxPwrIdx;
-
        /*  Read/write are allow for following hardware information variables */
        u8      framesync;
        u8      pwrGroupCnt;