drm/i915/gt: Support multiple pinned timelines

We may need to allocate more than one pinned context/timeline for each
engine which can utilise the per-engine HWSP, so we need to give each
a different offset within it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200730183906.25422-1-chris@chris-wilson.co.uk
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index efc4ba34c06e8ca5fe340bf6116d67cbf88ff4b3..d8cccbab7a51d7aa9dd6316a88659f17a05313a1 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -886,7 +886,7 @@ i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
        if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
                struct intel_timeline *timeline;
 
-               timeline = intel_timeline_create(&i915->gt, NULL);
+               timeline = intel_timeline_create(&i915->gt);
                if (IS_ERR(timeline)) {
                        context_close(ctx);
                        return ERR_CAST(timeline);

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index dd1a42c4d344ee70630a3f3b190e5e093933dc0f..86651bbef3a029e3c069edcffa0c39618d0dc67a 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -785,9 +785,11 @@ intel_engine_init_active(struct intel_engine_cs *engine, unsigned int subclass)
 }
 
 static struct intel_context *
-create_kernel_context(struct intel_engine_cs *engine)
+create_pinned_context(struct intel_engine_cs *engine,
+                     unsigned int hwsp,
+                     struct lock_class_key *key,
+                     const char *name)
 {
-       static struct lock_class_key kernel;
        struct intel_context *ce;
        int err;
 
@@ -796,6 +798,7 @@ create_kernel_context(struct intel_engine_cs *engine)
                return ce;
 
        __set_bit(CONTEXT_BARRIER_BIT, &ce->flags);
+       ce->timeline = page_pack_bits(NULL, hwsp);
 
        err = intel_context_pin(ce); /* perma-pin so it is always available */
        if (err) {
@@ -809,11 +812,20 @@ create_kernel_context(struct intel_engine_cs *engine)
         * should we need to inject GPU operations during their request
         * construction.
         */
-       lockdep_set_class(&ce->timeline->mutex, &kernel);
+       lockdep_set_class_and_name(&ce->timeline->mutex, key, name);
 
        return ce;
 }
 
+static struct intel_context *
+create_kernel_context(struct intel_engine_cs *engine)
+{
+       static struct lock_class_key kernel;
+
+       return create_pinned_context(engine, I915_GEM_HWS_SEQNO_ADDR,
+                                    &kernel, "kernel_context");
+}
+
 /**
  * intel_engines_init_common - initialize cengine state which might require hw access
  * @engine: Engine to initialize.

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 1138b5c56e2f8b4a8ad7f17d66b34661cad76577..4cc385e1e77eab88af7ce513d172d4ee5c4ebb6b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -5306,6 +5306,14 @@ populate_lr_context(struct intel_context *ce,
        return 0;
 }
 
+static struct intel_timeline *pinned_timeline(struct intel_context *ce)
+{
+       struct intel_timeline *tl = fetch_and_zero(&ce->timeline);
+
+       return intel_timeline_create_from_engine(ce->engine,
+                                                page_unmask_bits(tl));
+}
+
 static int __execlists_context_alloc(struct intel_context *ce,
                                     struct intel_engine_cs *engine)
 {
@@ -5336,19 +5344,17 @@ static int __execlists_context_alloc(struct intel_context *ce,
                goto error_deref_obj;
        }
 
-       if (!ce->timeline) {
+       if (!page_mask_bits(ce->timeline)) {
                struct intel_timeline *tl;
-               struct i915_vma *hwsp;
 
                /*
                 * Use the static global HWSP for the kernel context, and
                 * a dynamically allocated cacheline for everyone else.
                 */
-               hwsp = NULL;
-               if (unlikely(intel_context_is_barrier(ce)))
-                       hwsp = engine->status_page.vma;
-
-               tl = intel_timeline_create(engine->gt, hwsp);
+               if (unlikely(ce->timeline))
+                       tl = pinned_timeline(ce);
+               else
+                       tl = intel_timeline_create(engine->gt);
                if (IS_ERR(tl)) {
                        ret = PTR_ERR(tl);
                        goto error_deref_obj;

diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 94915f668715d754ead2fca46900ae3483b78ff0..87cef6d0114185339381089cb614a1f1c7719249 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -1250,7 +1250,8 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine)
                return -ENODEV;
        }
 
-       timeline = intel_timeline_create(engine->gt, engine->status_page.vma);
+       timeline = intel_timeline_create_from_engine(engine,
+                                                    I915_GEM_HWS_SEQNO_ADDR);
        if (IS_ERR(timeline)) {
                err = PTR_ERR(timeline);
                goto err;

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 46d20f5f3ddcc93ff898d23cd3f779cff093d23d..4f446534bad076109e905b40851484f8c7dd771d 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -215,7 +215,8 @@ static void cacheline_free(struct intel_timeline_cacheline *cl)
 
 static int intel_timeline_init(struct intel_timeline *timeline,
                               struct intel_gt *gt,
-                              struct i915_vma *hwsp)
+                              struct i915_vma *hwsp,
+                              unsigned int offset)
 {
        void *vaddr;
 
@@ -246,8 +247,7 @@ static int intel_timeline_init(struct intel_timeline *timeline,
 
                vaddr = page_mask_bits(cl->vaddr);
        } else {
-               timeline->hwsp_offset = I915_GEM_HWS_SEQNO_ADDR;
-
+               timeline->hwsp_offset = offset;
                vaddr = i915_gem_object_pin_map(hwsp->obj, I915_MAP_WB);
                if (IS_ERR(vaddr))
                        return PTR_ERR(vaddr);
@@ -297,7 +297,9 @@ static void intel_timeline_fini(struct intel_timeline *timeline)
 }
 
 struct intel_timeline *
-intel_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp)
+__intel_timeline_create(struct intel_gt *gt,
+                       struct i915_vma *global_hwsp,
+                       unsigned int offset)
 {
        struct intel_timeline *timeline;
        int err;
@@ -306,7 +308,7 @@ intel_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp)
        if (!timeline)
                return ERR_PTR(-ENOMEM);
 
-       err = intel_timeline_init(timeline, gt, global_hwsp);
+       err = intel_timeline_init(timeline, gt, global_hwsp, offset);
        if (err) {
                kfree(timeline);
                return ERR_PTR(err);

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h
index 4298b9ac7327eff83a7569a9559239753d0daff2..06bd06c6595fe35af7d37e2b2f5f21558a23ae06 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_timeline.h
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
@@ -29,10 +29,27 @@
 
 #include "i915_active.h"
 #include "i915_syncmap.h"
-#include "gt/intel_timeline_types.h"
+#include "intel_timeline_types.h"
 
 struct intel_timeline *
-intel_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp);
+__intel_timeline_create(struct intel_gt *gt,
+                       struct i915_vma *global_hwsp,
+                       unsigned int offset);
+
+static inline struct intel_timeline *
+intel_timeline_create(struct intel_gt *gt)
+{
+       return __intel_timeline_create(gt, NULL, 0);
+}
+
+static inline struct intel_timeline *
+intel_timeline_create_from_engine(struct intel_engine_cs *engine,
+                                 unsigned int offset)
+{
+       return __intel_timeline_create(engine->gt,
+                                      engine->status_page.vma,
+                                      offset);
+}
 
 static inline struct intel_timeline *
 intel_timeline_get(struct intel_timeline *timeline)

diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c
index 06303ba98c191408f415469c4c2d8328a5ff69f6..d5beb116261f02dc8b06bd4ea9b40e2e0210003d 100644 (file)
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -153,7 +153,7 @@ static int mock_context_alloc(struct intel_context *ce)
                return -ENOMEM;
 
        GEM_BUG_ON(ce->timeline);
-       ce->timeline = intel_timeline_create(ce->engine->gt, NULL);
+       ce->timeline = intel_timeline_create(ce->engine->gt);
        if (IS_ERR(ce->timeline)) {
                kfree(ce->engine);
                return PTR_ERR(ce->timeline);

diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 6564c989dbee4984544b3a20aacbe93366904d60..98ceac2fb77de144c9386d46f351a6b7c2a53c23 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -72,7 +72,7 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state,
                unsigned long cacheline;
                int err;
 
-               tl = intel_timeline_create(state->gt, NULL);
+               tl = intel_timeline_create(state->gt);
                if (IS_ERR(tl))
                        return PTR_ERR(tl);
 
@@ -487,7 +487,7 @@ checked_intel_timeline_create(struct intel_gt *gt)
 {
        struct intel_timeline *tl;
 
-       tl = intel_timeline_create(gt, NULL);
+       tl = intel_timeline_create(gt);
        if (IS_ERR(tl))
                return tl;
 
@@ -660,7 +660,7 @@ static int live_hwsp_wrap(void *arg)
         * foreign GPU references.
         */
 
-       tl = intel_timeline_create(gt, NULL);
+       tl = intel_timeline_create(gt);
        if (IS_ERR(tl))
                return PTR_ERR(tl);