ARM: dts: renesas: Add R8A779F0 S4 Spider DTs

Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.

Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]

diff --git a/arch/arm/dts/r8a779f0-spider-cpu.dtsi b/arch/arm/dts/r8a779f0-spider-cpu.dtsi
new file mode 100644 (file)
index 0000000..dd8e0e1
--- /dev/null
+++ b/arch/arm/dts/r8a779f0-spider-cpu.dtsi
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0 or MIT)
+/*
+ * Device Tree Source for the Spider CPU board
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "r8a779f0.dtsi"
+
+/ {
+       model = "Renesas Spider CPU board";
+       compatible = "renesas,spider-cpu", "renesas,r8a779f0";
+
+       aliases {
+               serial0 = &hscif0;
+               serial1 = &scif0;
+       };
+
+       chosen {
+               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+               stdout-path = "serial0:1843200n8";
+       };
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x78000000>;
+       };
+
+       memory@480000000 {
+               device_type = "memory";
+               reg = <0x4 0x80000000 0x0 0x80000000>;
+       };
+
+       rc21012_ufs: clk-rc21012-ufs {
+               compatible = "fixed-clock";
+               clock-frequency = <38400000>;
+               #clock-cells = <0>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <20000000>;
+};
+
+&extalr_clk {
+       clock-frequency = <32768>;
+};
+
+&hscif0 {
+       pinctrl-0 = <&hscif0_pins>;
+       pinctrl-names = "default";
+
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       gpio_exp_20: gpio@20 {
+               compatible = "ti,tca9554";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+};
+
+&i2c4 {
+       pinctrl-0 = <&i2c4_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       eeprom@50 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "cpu-board";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
+};
+
+/*
+ * This board also has a microSD slot which we will not support upstream
+ * because we cannot directly switch voltages in software.
+ */
+&mmc0 {
+       pinctrl-0 = <&mmc_pins>;
+       pinctrl-1 = <&mmc_pins>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       bus-width = <8>;
+       no-sd;
+       no-sdio;
+       non-removable;
+       full-pwr-cycle-in-suspend;
+       status = "okay";
+};
+
+&pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
+       hscif0_pins: hscif0 {
+               groups = "hscif0_data", "hscif0_ctrl";
+               function = "hscif0";
+       };
+
+       i2c0_pins: i2c0 {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       i2c4_pins: i2c4 {
+               groups = "i2c4";
+               function = "i2c4";
+       };
+
+       mmc_pins: mmc {
+               groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       scif0_pins: scif0 {
+               groups = "scif0_data", "scif0_ctrl";
+               function = "scif0";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk";
+               function = "scif_clk";
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};
+
+&scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&scif_clk {
+       clock-frequency = <24000000>;
+};
+
+&ufs {
+       status = "okay";
+};
+
+&ufs30_clk {
+       compatible = "gpio-gate-clock";
+       clocks = <&rc21012_ufs>;
+       enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>;
+       /delete-property/ clock-frequency;
+};

diff --git a/arch/arm/dts/r8a779f0-spider-ethernet.dtsi b/arch/arm/dts/r8a779f0-spider-ethernet.dtsi
new file mode 100644 (file)
index 0000000..33c1015
--- /dev/null
+++ b/arch/arm/dts/r8a779f0-spider-ethernet.dtsi
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Spider Ethernet sub-board
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+&eth_serdes {
+       status = "okay";
+};
+
+&i2c4 {
+       eeprom@52 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "ethernet-sub-board";
+               reg = <0x52>;
+               pagesize = <8>;
+       };
+};
+
+&pfc {
+       tsn0_pins: tsn0 {
+               groups = "tsn0_mdio_b", "tsn0_link_b";
+               function = "tsn0";
+               power-source = <1800>;
+       };
+
+       tsn1_pins: tsn1 {
+               groups = "tsn1_mdio_b", "tsn1_link_b";
+               function = "tsn1";
+               power-source = <1800>;
+       };
+
+       tsn2_pins: tsn2 {
+               groups = "tsn2_mdio_b", "tsn2_link_b";
+               function = "tsn2";
+               power-source = <1800>;
+       };
+};
+
+&rswitch {
+       pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>, <&tsn2_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       ethernet-ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       phy-handle = <&u101>;
+                       phy-mode = "sgmii";
+                       phys = <&eth_serdes 0>;
+
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               u101: ethernet-phy@1 {
+                                       reg = <1>;
+                                       compatible = "ethernet-phy-ieee802.3-c45";
+                                       interrupt-parent = <&gpio3>;
+                                       interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+                               };
+                       };
+               };
+               port@1 {
+                       reg = <1>;
+                       phy-handle = <&u201>;
+                       phy-mode = "sgmii";
+                       phys = <&eth_serdes 1>;
+
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               u201: ethernet-phy@2 {
+                                       reg = <2>;
+                                       compatible = "ethernet-phy-ieee802.3-c45";
+                                       interrupt-parent = <&gpio3>;
+                                       interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+                               };
+                       };
+               };
+               port@2 {
+                       reg = <2>;
+                       phy-handle = <&u301>;
+                       phy-mode = "sgmii";
+                       phys = <&eth_serdes 2>;
+
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               u301: ethernet-phy@3 {
+                                       reg = <3>;
+                                       compatible = "ethernet-phy-ieee802.3-c45";
+                                       interrupt-parent = <&gpio3>;
+                                       interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
+                               };
+                       };
+               };
+       };
+};

diff --git a/arch/arm/dts/r8a779f0-spider.dts b/arch/arm/dts/r8a779f0-spider.dts
new file mode 100644 (file)
index 0000000..7aac3f4
--- /dev/null
+++ b/arch/arm/dts/r8a779f0-spider.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 or MIT)
+/*
+ * Device Tree Source for the Spider CPU and BreakOut boards
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a779f0-spider-cpu.dtsi"
+#include "r8a779f0-spider-ethernet.dtsi"
+
+/ {
+       model = "Renesas Spider CPU and Breakout boards based on r8a779f0";
+       compatible = "renesas,spider-breakout", "renesas,spider-cpu", "renesas,r8a779f0";
+};
+
+&i2c4 {
+       eeprom@51 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "breakout-board";
+               reg = <0x51>;
+               pagesize = <8>;
+       };
+};