using namespace llvm::ELF;
using namespace llvm::object;
using namespace llvm::sys;
+using namespace llvm::support;
using namespace lld;
using namespace lld::elf;
// This function initialize such members. See Config.h for the details
// of these values.
static void setConfigs(opt::InputArgList &Args) {
- ELFKind Kind = Config->EKind;
- uint16_t Machine = Config->EMachine;
+ ELFKind K = Config->EKind;
+ uint16_t M = Config->EMachine;
Config->CopyRelocs = (Config->Relocatable || Config->EmitRelocs);
- Config->Is64 = (Kind == ELF64LEKind || Kind == ELF64BEKind);
- Config->IsLE = (Kind == ELF32LEKind || Kind == ELF64LEKind);
- Config->Endianness =
- Config->IsLE ? support::endianness::little : support::endianness::big;
- Config->IsMips64EL = (Kind == ELF64LEKind && Machine == EM_MIPS);
+ Config->Is64 = (K == ELF64LEKind || K == ELF64BEKind);
+ Config->IsLE = (K == ELF32LEKind || K == ELF64LEKind);
+ Config->Endianness = Config->IsLE ? endianness::little : endianness::big;
+ Config->IsMips64EL = (K == ELF64LEKind && M == EM_MIPS);
Config->Pic = Config->Pie || Config->Shared;
Config->Wordsize = Config->Is64 ? 8 : 4;
// You cannot choose which one, Rel or Rela, you want to use. Instead each
// ABI defines which one you need to use. The following expression expresses
// that.
- Config->IsRela = Machine == EM_AARCH64 || Machine == EM_AMDGPU ||
- Machine == EM_PPC || Machine == EM_PPC64 ||
- Machine == EM_RISCV || Machine == EM_X86_64;
+ Config->IsRela = M == EM_AARCH64 || M == EM_AMDGPU || M == EM_PPC ||
+ M == EM_PPC64 || M == EM_RISCV || M == EM_X86_64;
// If the output uses REL relocations we must store the dynamic relocation
// addends to the output sections. We also store addends for RELA relocations
!Config->IsRela;
Config->TocOptimize =
- Args.hasFlag(OPT_toc_optimize, OPT_no_toc_optimize, Machine == EM_PPC64);
+ Args.hasFlag(OPT_toc_optimize, OPT_no_toc_optimize, M == EM_PPC64);
}
// Returns a value of "-format" option.