static void impd1_setvco(struct clk *clk, struct icst_vco vco)
{
struct impd1_module *impd1 = clk->data;
- int vconr = clk - impd1->vcos;
- u32 val;
-
- val = vco.v | (vco.r << 9) | (vco.s << 16);
+ u32 val = vco.v | (vco.r << 9) | (vco.s << 16);
writel(0xa05f, impd1->base + IMPD1_LOCK);
- switch (vconr) {
- case 0:
- writel(val, impd1->base + IMPD1_OSC1);
- break;
- case 1:
- writel(val, impd1->base + IMPD1_OSC2);
- break;
- }
+ writel(val, clk->vcoreg);
writel(0, impd1->base + IMPD1_LOCK);
#ifdef DEBUG
impd1->vcos[i].data = impd1,
impd1->vcos[i].setvco = impd1_setvco;
}
+ impd1->vcos[0].vcoreg = impd1->base + IMPD1_OSC1;
+ impd1->vcos[1].vcoreg = impd1->base + IMPD1_OSC2;
impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
dev->id);
unsigned long rate;
struct module *owner;
const struct icst_params *params;
- void *data;
+ void __iomem *vcoreg;
void (*setvco)(struct clk *, struct icst_vco vco);
+ void *data;
};
static inline int __clk_get(struct clk *clk)
/*
* Clock handling
*/
-#define CM_LOCK IO_ADDRESS(INTEGRATOR_HDR_LOCK)
-#define CM_AUXOSC IO_ADDRESS(INTEGRATOR_HDR_BASE + 0x1c)
+#define CM_LOCK (__io_address(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET)
+#define CM_AUXOSC (__io_address(INTEGRATOR_HDR_BASE)+0x1c)
static const struct icst_params cp_auxvco_params = {
.ref = 24000000,
{
u32 val;
- val = readl(CM_AUXOSC) & ~0x7ffff;
+ val = readl(clk->vcoreg) & ~0x7ffff;
val |= vco.v | (vco.r << 9) | (vco.s << 16);
writel(0xa05f, CM_LOCK);
- writel(val, CM_AUXOSC);
+ writel(val, clk->vcoreg);
writel(0, CM_LOCK);
}
static struct clk cp_auxclk = {
.params = &cp_auxvco_params,
+ .vcoreg = CM_AUXOSC,
.setvco = cp_auxvco_set,
};
static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
{
void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
- void __iomem *sys_osc;
u32 val;
- if (machine_is_realview_pb1176())
- sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
- else
- sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
-
- val = readl(sys_osc) & ~0x7ffff;
+ val = readl(clk->vcoreg) & ~0x7ffff;
val |= vco.v | (vco.r << 9) | (vco.s << 16);
writel(0xa05f, sys_lock);
- writel(val, sys_osc);
+ writel(val, clk->vcoreg);
writel(0, sys_lock);
}
static int __init clk_init(void)
{
+ if (machine_is_realview_pb1176())
+ oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
+ else
+ oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
return 0;
}
arch_initcall(clk_init);
struct clk {
unsigned long rate;
const struct icst_params *params;
- u32 oscoff;
+ void __iomem *vcoreg;
void (*setvco)(struct clk *, struct icst_vco vco);
};
static void versatile_oscvco_set(struct clk *clk, struct icst_vco vco)
{
- void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
- void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
+ void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET;
u32 val;
- val = readl(sys + clk->oscoff) & ~0x7ffff;
+ val = readl(clk->vcoreg) & ~0x7ffff;
val |= vco.v | (vco.r << 9) | (vco.s << 16);
writel(0xa05f, sys_lock);
- writel(val, sys + clk->oscoff);
+ writel(val, clk->vcoreg);
writel(0, sys_lock);
}
static struct clk osc4_clk = {
.params = &versatile_oscvco_params,
- .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
.setvco = versatile_oscvco_set,
};
{
int i;
+ osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
platform_device_register(&versatile_flash_device);
struct clk {
unsigned long rate;
const struct icst_params *params;
- u32 oscoff;
+ void __iomem *vcoreg;
void (*setvco)(struct clk *, struct icst_vco vco);
};