* Basic I/O
*/
+/*
+ * default rates, default clock routines
+ */
+
/* check whether the clock mode is spdif-in */
-static inline int is_spdif_master(struct snd_ice1712 *ice)
+static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
{
return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
}
static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
{
- return is_spdif_master(ice) || PRO_RATE_LOCKED;
+ return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
}
/*
#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
-static int get_max_rate(struct snd_ice1712 *ice)
+static const unsigned int stdclock_rate_list[16] = {
+ 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
+ 22050, 11025, 88200, 176400, 0, 192000, 64000
+};
+
+static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
{
+ unsigned int rate;
+ rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
+ return rate;
+}
+
+static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
+{
+ int i;
+ for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
+ if (stdclock_rate_list[i] == rate) {
+ outb(i, ICEMT1724(ice, RATE));
+ return;
+ }
+ }
+}
+
+static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
+ unsigned int rate)
+{
+ unsigned char val, old;
+ /* check MT02 */
if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
- if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
- return 192000;
+ val = old = inb(ICEMT1724(ice, I2S_FORMAT));
+ if (rate > 96000)
+ val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
else
- return 96000;
- } else
- return 48000;
+ val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
+ if (val != old) {
+ outb(val, ICEMT1724(ice, I2S_FORMAT));
+ /* master clock changed */
+ return 1;
+ }
+ }
+ /* no change in master clock */
+ return 0;
}
static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
int force)
{
unsigned long flags;
- unsigned char val, old;
- unsigned int i, mclk_change;
+ unsigned char mclk_change;
+ unsigned int i, old_rate;
- if (rate > get_max_rate(ice))
+ if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
return;
-
- switch (rate) {
- case 8000: val = 6; break;
- case 9600: val = 3; break;
- case 11025: val = 10; break;
- case 12000: val = 2; break;
- case 16000: val = 5; break;
- case 22050: val = 9; break;
- case 24000: val = 1; break;
- case 32000: val = 4; break;
- case 44100: val = 8; break;
- case 48000: val = 0; break;
- case 64000: val = 15; break;
- case 88200: val = 11; break;
- case 96000: val = 7; break;
- case 176400: val = 12; break;
- case 192000: val = 14; break;
- default:
- snd_BUG();
- val = 0;
- break;
- }
-
spin_lock_irqsave(&ice->reg_lock, flags);
- if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
+ if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
(inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
/* running? we cannot change the rate now... */
spin_unlock_irqrestore(&ice->reg_lock, flags);
return;
}
- old = inb(ICEMT1724(ice, RATE));
- if (force || old != val)
- outb(val, ICEMT1724(ice, RATE));
+ old_rate = ice->get_rate(ice);
+ if (force || (old_rate != rate))
+ ice->set_rate(ice, rate);
else if (rate == ice->cur_rate) {
spin_unlock_irqrestore(&ice->reg_lock, flags);
return;
ice->cur_rate = rate;
- /* check MT02 */
- mclk_change = 0;
- if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
- val = old = inb(ICEMT1724(ice, I2S_FORMAT));
- if (rate > 96000)
- val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
- else
- val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
- if (val != old) {
- outb(val, ICEMT1724(ice, I2S_FORMAT));
- mclk_change = 1;
- }
- }
+ /* setting master clock */
+ mclk_change = ice->set_mclk(ice, rate);
+
spin_unlock_irqrestore(&ice->reg_lock, flags);
if (mclk_change && ice->gpio.i2s_mclk_changed)
/*
* set rate constraints
*/
-static int set_rate_constraints(struct snd_ice1712 *ice,
- struct snd_pcm_substream *substream)
+static void set_std_hw_rates(struct snd_ice1712 *ice)
{
- struct snd_pcm_runtime *runtime = substream->runtime;
- if (ice->hw_rates) {
- /* hardware specific */
- runtime->hw.rate_min = ice->hw_rates->list[0];
- runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
- runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
- return snd_pcm_hw_constraint_list(runtime, 0,
- SNDRV_PCM_HW_PARAM_RATE,
- ice->hw_rates);
- }
if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
/* I2S */
/* VT1720 doesn't support more than 96kHz */
if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
- return snd_pcm_hw_constraint_list(runtime, 0,
- SNDRV_PCM_HW_PARAM_RATE,
- &hw_constraints_rates_192);
- else {
- runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
- SNDRV_PCM_RATE_8000_96000;
- runtime->hw.rate_max = 96000;
- return snd_pcm_hw_constraint_list(runtime, 0,
- SNDRV_PCM_HW_PARAM_RATE,
- &hw_constraints_rates_96);
- }
- } else if (ice->ac97) {
+ ice->hw_rates = &hw_constraints_rates_192;
+ else
+ ice->hw_rates = &hw_constraints_rates_96;
+ } else {
/* ACLINK */
- runtime->hw.rate_max = 48000;
- runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
- return snd_pcm_hw_constraint_list(runtime, 0,
- SNDRV_PCM_HW_PARAM_RATE,
- &hw_constraints_rates_48);
+ ice->hw_rates = &hw_constraints_rates_48;
}
- return 0;
+}
+
+static int set_rate_constraints(struct snd_ice1712 *ice,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+
+ runtime->hw.rate_min = ice->hw_rates->list[0];
+ runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
+ runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
+ return snd_pcm_hw_constraint_list(runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ ice->hw_rates);
}
/* multi-channel playback needs alignment 8x32bit regardless of the channels
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_pro_substream = NULL;
return 0;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->capture_pro_substream = NULL;
return 0;
}
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_con_substream = NULL;
if (ice->spdif.ops.close)
ice->spdif.ops.close(ice, substream);
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->capture_con_substream = NULL;
if (ice->spdif.ops.close)
ice->spdif.ops.close(ice, substream);
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_con_substream_ds[substream->number] = NULL;
ice->pcm_reserved[substream->number] = NULL;
static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
- static const char * const texts_1724[] = {
- "8000", /* 0: 6 */
- "9600", /* 1: 3 */
- "11025", /* 2: 10 */
- "12000", /* 3: 2 */
- "16000", /* 4: 5 */
- "22050", /* 5: 9 */
- "24000", /* 6: 1 */
- "32000", /* 7: 4 */
- "44100", /* 8: 8 */
- "48000", /* 9: 0 */
- "64000", /* 10: 15 */
- "88200", /* 11: 11 */
- "96000", /* 12: 7 */
- "176400", /* 13: 12 */
- "192000", /* 14: 14 */
- "IEC958 Input", /* 15: -- */
- };
- static const char * const texts_1720[] = {
- "8000", /* 0: 6 */
- "9600", /* 1: 3 */
- "11025", /* 2: 10 */
- "12000", /* 3: 2 */
- "16000", /* 4: 5 */
- "22050", /* 5: 9 */
- "24000", /* 6: 1 */
- "32000", /* 7: 4 */
- "44100", /* 8: 8 */
- "48000", /* 9: 0 */
- "64000", /* 10: 15 */
- "88200", /* 11: 11 */
- "96000", /* 12: 7 */
- "IEC958 Input", /* 13: -- */
- };
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
- uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
+ uinfo->value.enumerated.items = ice->hw_rates->count + 1;
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
- strcpy(uinfo->value.enumerated.name,
- ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
- texts_1724[uinfo->value.enumerated.item]);
+ if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
+ strcpy(uinfo->value.enumerated.name, "IEC958 Input");
+ else
+ sprintf(uinfo->value.enumerated.name, "%d",
+ ice->hw_rates->list[uinfo->value.enumerated.item]);
return 0;
}
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
- static const unsigned char xlate[16] = {
- 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
- };
- unsigned char val;
+ unsigned int i, rate;
spin_lock_irq(&ice->reg_lock);
- if (is_spdif_master(ice)) {
- ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
+ if (ice->is_spdif_master(ice)) {
+ ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
} else {
- val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
- if (val == 255) {
- snd_BUG();
- val = 0;
+ rate = ice->get_rate(ice);
+ ucontrol->value.enumerated.item[0] = 0;
+ for (i = 0; i < ice->hw_rates->count; i++) {
+ if (ice->hw_rates->list[i] == rate) {
+ ucontrol->value.enumerated.item[0] = i;
+ break;
+ }
}
- ucontrol->value.enumerated.item[0] = val;
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
+/* setting clock to external - SPDIF */
+static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
+{
+ unsigned char oval;
+ unsigned char i2s_oval;
+ oval = inb(ICEMT1724(ice, RATE));
+ outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
+ /* setting 256fs */
+ i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
+ outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
+}
+
static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
- unsigned char oval;
- int rate;
- int change = 0;
- int spdif = ice->vt1720 ? 13 : 15;
+ unsigned int old_rate, new_rate;
+ unsigned int item = ucontrol->value.enumerated.item[0];
+ unsigned int spdif = ice->hw_rates->count;
+
+ if (item > spdif)
+ return -EINVAL;
spin_lock_irq(&ice->reg_lock);
- oval = inb(ICEMT1724(ice, RATE));
- if (ucontrol->value.enumerated.item[0] == spdif) {
- unsigned char i2s_oval;
- outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
- /* setting 256fs */
- i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
- outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X,
- ICEMT1724(ice, I2S_FORMAT));
+ if (ice->is_spdif_master(ice))
+ old_rate = 0;
+ else
+ old_rate = ice->get_rate(ice);
+ if (item == spdif) {
+ /* switching to external clock via SPDIF */
+ ice->set_spdif_clock(ice);
+ new_rate = 0;
} else {
- rate = rates[ucontrol->value.integer.value[0] % 15];
- if (rate <= get_max_rate(ice)) {
- PRO_RATE_DEFAULT = rate;
- spin_unlock_irq(&ice->reg_lock);
- snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
- spin_lock_irq(&ice->reg_lock);
- }
+ /* internal on-card clock */
+ new_rate = ice->hw_rates->list[item];
+ ice->pro_rate_default = new_rate;
+ spin_unlock_irq(&ice->reg_lock);
+ snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
+ spin_lock_irq(&ice->reg_lock);
}
- change = inb(ICEMT1724(ice, RATE)) != oval;
spin_unlock_irq(&ice->reg_lock);
- if ((oval & VT1724_SPDIF_MASTER) !=
- (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
+ /* the first reset to the SPDIF master mode? */
+ if (old_rate != new_rate && !new_rate) {
/* notify akm chips as well */
- if (is_spdif_master(ice)) {
- unsigned int i;
- for (i = 0; i < ice->akm_codecs; i++) {
- if (ice->akm[i].ops.set_rate_val)
- ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
- }
+ unsigned int i;
+ if (ice->gpio.set_pro_rate)
+ ice->gpio.set_pro_rate(ice, 0);
+ for (i = 0; i < ice->akm_codecs; i++) {
+ if (ice->akm[i].ops.set_rate_val)
+ ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
}
}
- return change;
+ return old_rate != new_rate;
}
static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
* was called so in ice1712 driver, and vt1724 driver is derived from
* ice1712 driver.
*/
+ ice->pro_rate_default = PRO_RATE_DEFAULT;
+ if (!ice->is_spdif_master)
+ ice->is_spdif_master = stdclock_is_spdif_master;
+ if (!ice->get_rate)
+ ice->get_rate = stdclock_get_rate;
+ if (!ice->set_rate)
+ ice->set_rate = stdclock_set_rate;
+ if (!ice->set_mclk)
+ ice->set_mclk = stdclock_set_mclk;
+ if (!ice->set_spdif_clock)
+ ice->set_spdif_clock = stdclock_set_spdif_clock;
+ if (!ice->hw_rates)
+ set_std_hw_rates(ice);
if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
snd_card_free(card);
* Lowlevel functions for ESI Juli@ cards
*
* Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
+ * 2008 Pavel Hofman <dustin@seznam.cz>
+ *
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
+#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "juli.h"
-
struct juli_spec {
struct ak4114 *ak4114;
unsigned int analog: 1;
#define AK4358_ADDR 0x22 /* DAC */
/*
+ * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
+ * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
+ * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
+ *
+ * The clock circuitry is supplied by the two ice1724 crystals. This
+ * arrangement allows to generate independent clock signal for AK4114's input
+ * rate detection circuit. As a result, Juli, unlike most other
+ * ice1724+ak4114-based cards, detects spdif input rate correctly.
+ * This fact is applied in the driver, allowing to modify PCM stream rate
+ * parameter according to the actual input rate.
+ *
+ * Juli uses the remaining three stereo-channels of its DAC to optionally
+ * monitor analog input, digital input, and digital output. The corresponding
+ * I2S signals are routed by Xilinx, controlled by GPIOs.
+ *
+ * The master mute is implemented using output muting transistors (GPIO) in
+ * combination with smuting the DAC.
+ *
+ * The card itself has no HW master volume control, implemented using the
+ * vmaster control.
+ *
+ * TODO:
+ * researching and fixing the input monitors
+ */
+
+/*
* GPIO pins
*/
#define GPIO_FREQ_MASK (3<<0)
#define GPIO_MULTI_2X (1<<2)
#define GPIO_MULTI_1X (2<<2) /* also external */
#define GPIO_MULTI_HALF (3<<2)
-#define GPIO_INTERNAL_CLOCK (1<<4)
+#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
+#define GPIO_CLOCK_MASK (1<<4)
#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
#define GPIO_AK5385A_CKS0 (1<<8)
-#define GPIO_AK5385A_DFS0 (1<<9) /* swapped with DFS1 according doc? */
-#define GPIO_AK5385A_DFS1 (1<<10)
+#define GPIO_AK5385A_DFS1 (1<<9)
+#define GPIO_AK5385A_DFS0 (1<<10)
#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
-#define GPIO_AK5385A_MCLK (1<<14) /* must be 0 */
-#define GPIO_MUTE_CONTROL (1<<15) /* 0 = off, 1 = on */
+#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
+#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
+
+#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
+ GPIO_CLOCK_MASK)
+#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
+ GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
+
+#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
+ SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
+
+#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
+ GPIO_INTERNAL_CLOCK)
+#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
+ GPIO_INTERNAL_CLOCK)
+
+/*
+ * Initial setup of the conversion array GPIO <-> rate
+ */
+static unsigned int juli_rates[] = {
+ 16000, 22050, 24000, 32000,
+ 44100, 48000, 64000, 88200,
+ 96000, 176400, 192000,
+};
+
+static unsigned int gpio_vals[] = {
+ GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
+ GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
+ GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
+};
+
+static struct snd_pcm_hw_constraint_list juli_rates_info = {
+ .count = ARRAY_SIZE(juli_rates),
+ .list = juli_rates,
+ .mask = 0,
+};
+
+static int get_gpio_val(int rate)
+{
+ int i;
+ for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
+ if (juli_rates[i] == rate)
+ return gpio_vals[i];
+ return 0;
+}
static void juli_ak4114_write(void *private_data, unsigned char reg, unsigned char val)
{
return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, reg);
}
+/*
+ * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
+ * to the external rate
+ */
static void juli_spdif_in_open(struct snd_ice1712 *ice,
struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int rate;
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
+ !ice->is_spdif_master(ice))
return;
rate = snd_ak4114_external_rate(spec->ak4114);
if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
}
/*
- * change the rate of envy24HT, AK4358
+ * change the rate of envy24HT, AK4358, AK5385
*/
static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
- unsigned char old, tmp, dfs;
+ unsigned char old, tmp, ak4358_dfs;
+ unsigned int ak5385_pins, old_gpio, new_gpio;
+ struct snd_ice1712 *ice = ak->private_data[0];
+ struct juli_spec *spec = ice->spec;
- if (rate == 0) /* no hint - S/PDIF input is master, simply return */
+ if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
+ input rate undetected, simply return */
return;
-
+
/* adjust DFS on codecs */
- if (rate > 96000)
- dfs = 2;
- else if (rate > 48000)
- dfs = 1;
- else
- dfs = 0;
-
+ if (rate > 96000) {
+ ak4358_dfs = 2;
+ ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
+ } else if (rate > 48000) {
+ ak4358_dfs = 1;
+ ak5385_pins = GPIO_AK5385A_DFS0;
+ } else {
+ ak4358_dfs = 0;
+ ak5385_pins = 0;
+ }
+ /* AK5385 first, since it requires cold reset affecting both codecs */
+ old_gpio = ice->gpio.get_data(ice);
+ new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
+ /* printk(KERN_DEBUG "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
+ new_gpio); */
+ ice->gpio.set_data(ice, new_gpio);
+
+ /* cold reset */
+ old = inb(ICEMT1724(ice, AC97_CMD));
+ outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
+ udelay(1);
+ outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
+
+ /* AK4358 */
+ /* set new value, reset DFS */
tmp = snd_akm4xxx_get(ak, 0, 2);
- old = (tmp >> 4) & 0x03;
- if (old == dfs)
- return;
- /* reset DFS */
snd_akm4xxx_reset(ak, 1);
tmp = snd_akm4xxx_get(ak, 0, 2);
tmp &= ~(0x03 << 4);
- tmp |= dfs << 4;
+ tmp |= ak4358_dfs << 4;
snd_akm4xxx_set(ak, 0, 2, tmp);
snd_akm4xxx_reset(ak, 0);
+
+ /* reinit ak4114 */
+ snd_ak4114_reinit(spec->ak4114);
}
+#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
+#define PCM_VOLUME "PCM Playback Volume"
+#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
+#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
+#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
+
+static const struct snd_akm4xxx_dac_channel juli_dac[] = {
+ AK_DAC(PCM_VOLUME, 2),
+ AK_DAC(MONITOR_AN_IN_VOLUME, 2),
+ AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
+ AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
+};
+
+
static struct snd_akm4xxx akm_juli_dac __devinitdata = {
.type = SND_AK4358,
- .num_dacs = 2,
+ .num_dacs = 8, /* DAC1 - analog out
+ DAC2 - analog in monitor
+ DAC3 - digital out monitor
+ DAC4 - digital in monitor
+ */
.ops = {
.lock = juli_akm_lock,
.unlock = juli_akm_unlock,
.write = juli_akm_write,
.set_rate_val = juli_akm_set_rate_val
+ },
+ .dac_info = juli_dac,
+};
+
+#define juli_mute_info snd_ctl_boolean_mono_info
+
+static int juli_mute_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
+ unsigned int val;
+ val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
+ if (kcontrol->private_value == GPIO_MUTE_CONTROL)
+ /* val 0 = signal on */
+ ucontrol->value.integer.value[0] = (val) ? 0 : 1;
+ else
+ /* val 1 = signal on */
+ ucontrol->value.integer.value[0] = (val) ? 1 : 0;
+ return 0;
+}
+
+static int juli_mute_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
+ unsigned int old_gpio, new_gpio;
+ old_gpio = ice->gpio.get_data(ice);
+ if (ucontrol->value.integer.value[0]) {
+ /* unmute */
+ if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
+ /* 0 = signal on */
+ new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
+ /* un-smuting DAC */
+ snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
+ } else
+ /* 1 = signal on */
+ new_gpio = old_gpio |
+ (unsigned int) kcontrol->private_value;
+ } else {
+ /* mute */
+ if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
+ /* 1 = signal off */
+ new_gpio = old_gpio | GPIO_MUTE_CONTROL;
+ /* smuting DAC */
+ snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
+ } else
+ /* 0 = signal off */
+ new_gpio = old_gpio &
+ ~((unsigned int) kcontrol->private_value);
+ }
+ /* printk("JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, \
+ new_gpio 0x%x\n",
+ (unsigned int)ucontrol->value.integer.value[0], old_gpio,
+ new_gpio); */
+ if (old_gpio != new_gpio) {
+ ice->gpio.set_data(ice, new_gpio);
+ return 1;
+ }
+ /* no change */
+ return 0;
+}
+
+static struct snd_kcontrol_new juli_mute_controls[] __devinitdata = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Master Playback Switch",
+ .info = juli_mute_info,
+ .get = juli_mute_get,
+ .put = juli_mute_put,
+ .private_value = GPIO_MUTE_CONTROL,
+ },
+ /* Although the following functionality respects the succint NDA'd
+ * documentation from the card manufacturer, and the same way of
+ * operation is coded in OSS Juli driver, only Digital Out monitor
+ * seems to work. Surprisingly, Analog input monitor outputs Digital
+ * output data. The two are independent, as enabling both doubles
+ * volume of the monitor sound.
+ *
+ * Checking traces on the board suggests the functionality described
+ * by the manufacturer is correct - I2S from ADC and AK4114
+ * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
+ * inputs) are fed from Xilinx.
+ *
+ * I even checked traces on board and coded a support in driver for
+ * an alternative possiblity - the unused I2S ICE output channels
+ * switched to HW-IN/SPDIF-IN and providing the monitoring signal to
+ * the DAC - to no avail. The I2S outputs seem to be unconnected.
+ *
+ * The windows driver supports the monitoring correctly.
+ */
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Monitor Analog In Switch",
+ .info = juli_mute_info,
+ .get = juli_mute_get,
+ .put = juli_mute_put,
+ .private_value = GPIO_ANAIN_MONITOR,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Monitor Digital Out Switch",
+ .info = juli_mute_info,
+ .get = juli_mute_get,
+ .put = juli_mute_put,
+ .private_value = GPIO_DIGOUT_MONITOR,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Monitor Digital In Switch",
+ .info = juli_mute_info,
+ .get = juli_mute_get,
+ .put = juli_mute_put,
+ .private_value = GPIO_DIGIN_MONITOR,
+ },
+};
+
+
+static void ak4358_proc_regs_read(struct snd_info_entry *entry,
+ struct snd_info_buffer *buffer)
+{
+ struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
+ int reg, val;
+ for (reg = 0; reg <= 0xf; reg++) {
+ val = snd_akm4xxx_get(ice->akm, 0, reg);
+ snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
}
+}
+
+static void ak4358_proc_init(struct snd_ice1712 *ice)
+{
+ struct snd_info_entry *entry;
+ if (!snd_card_proc_new(ice->card, "ak4358_codec", &entry))
+ snd_info_set_text_ops(entry, ice, ak4358_proc_regs_read);
+}
+
+static char *slave_vols[] __devinitdata = {
+ PCM_VOLUME,
+ MONITOR_AN_IN_VOLUME,
+ MONITOR_DIG_IN_VOLUME,
+ MONITOR_DIG_OUT_VOLUME,
+ NULL
};
+static __devinitdata
+DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
+
+static struct snd_kcontrol __devinit *ctl_find(struct snd_card *card,
+ const char *name)
+{
+ struct snd_ctl_elem_id sid;
+ memset(&sid, 0, sizeof(sid));
+ /* FIXME: strcpy is bad. */
+ strcpy(sid.name, name);
+ sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ return snd_ctl_find_id(card, &sid);
+}
+
+static void __devinit add_slaves(struct snd_card *card,
+ struct snd_kcontrol *master, char **list)
+{
+ for (; *list; list++) {
+ struct snd_kcontrol *slave = ctl_find(card, *list);
+ /* printk(KERN_DEBUG "add_slaves - %s\n", *list); */
+ if (slave) {
+ /* printk(KERN_DEBUG "slave %s found\n", *list); */
+ snd_ctl_add_slave(master, slave);
+ }
+ }
+}
+
static int __devinit juli_add_controls(struct snd_ice1712 *ice)
{
struct juli_spec *spec = ice->spec;
int err;
+ unsigned int i;
+ struct snd_kcontrol *vmaster;
+
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
+
+ for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
+ err = snd_ctl_add(ice->card,
+ snd_ctl_new1(&juli_mute_controls[i], ice));
+ if (err < 0)
+ return err;
+ }
+ /* Create virtual master control */
+ vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
+ juli_master_db_scale);
+ if (!vmaster)
+ return -ENOMEM;
+ add_slaves(ice->card, vmaster, slave_vols);
+ err = snd_ctl_add(ice->card, vmaster);
+ if (err < 0)
+ return err;
+
/* only capture SPDIF over AK4114 */
err = snd_ak4114_build(spec->ak4114, NULL,
- ice->pcm_pro->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
+ ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
+
+ ak4358_proc_init(ice);
if (err < 0)
return err;
return 0;
/*
* initialize the chip
*/
+
+static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
+{
+ return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
+}
+
+static unsigned int juli_get_rate(struct snd_ice1712 *ice)
+{
+ int i;
+ unsigned char result;
+
+ result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
+ for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
+ if (gpio_vals[i] == result)
+ return juli_rates[i];
+ return 0;
+}
+
+/* setting new rate */
+static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
+{
+ unsigned int old, new;
+ unsigned char val;
+
+ old = ice->gpio.get_data(ice);
+ new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
+ /* printk(KERN_DEBUG "JULI - set_rate: old %x, new %x\n",
+ old & GPIO_RATE_MASK,
+ new & GPIO_RATE_MASK); */
+
+ ice->gpio.set_data(ice, new);
+ /* switching to external clock - supplied by external circuits */
+ val = inb(ICEMT1724(ice, RATE));
+ outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
+}
+
+static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
+ unsigned int rate)
+{
+ /* no change in master clock */
+ return 0;
+}
+
+/* setting clock to external - SPDIF */
+static void juli_set_spdif_clock(struct snd_ice1712 *ice)
+{
+ unsigned int old;
+ old = ice->gpio.get_data(ice);
+ /* external clock (= 0), multiply 1x, 48kHz */
+ ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
+ GPIO_FREQ_48KHZ);
+}
+
+/* Called when ak4114 detects change in the input SPDIF stream */
+static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
+ unsigned char c1)
+{
+ struct snd_ice1712 *ice = ak4114->change_callback_private;
+ int rate;
+ if (ice->is_spdif_master(ice) && c1) {
+ /* only for SPDIF master mode, rate was changed */
+ rate = snd_ak4114_external_rate(ak4114);
+ /* printk(KERN_DEBUG "ak4114 - input rate changed to %d\n",
+ rate); */
+ juli_akm_set_rate_val(ice->akm, rate);
+ }
+}
+
static int __devinit juli_init(struct snd_ice1712 *ice)
{
static const unsigned char ak4114_init_vals[] = {
ice, &spec->ak4114);
if (err < 0)
return err;
+ /* callback for codecs rate setting */
+ spec->ak4114->change_callback = juli_ak4114_change;
+ spec->ak4114->change_callback_private = ice;
+ /* AK4114 in Juli can detect external rate correctly */
+ spec->ak4114->check_flags = 0;
#if 0
/* it seems that the analog doughter board detection does not work
return err;
}
+ /* juli is clocked by Xilinx array */
+ ice->hw_rates = &juli_rates_info;
+ ice->is_spdif_master = juli_is_spdif_master;
+ ice->get_rate = juli_get_rate;
+ ice->set_rate = juli_set_rate;
+ ice->set_mclk = juli_set_mclk;
+ ice->set_spdif_clock = juli_set_spdif_clock;
+
ice->spdif.ops.open = juli_spdif_in_open;
return 0;
}
*/
static unsigned char juli_eeprom[] __devinitdata = {
- [ICE_EEP2_SYSCONF] = 0x20, /* clock 512, mpu401, 1xADC, 1xDACs */
+ [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
+ SPDIF in */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
- [ICE_EEP2_GPIO_DIR] = 0x9f,
+ [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x7f,
- [ICE_EEP2_GPIO_MASK] = 0x9f,
- [ICE_EEP2_GPIO_MASK1] = 0xff,
+ [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
+ [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
[ICE_EEP2_GPIO_MASK2] = 0x7f,
- [ICE_EEP2_GPIO_STATE] = 0x16, /* internal clock, multiple 1x, 48kHz */
- [ICE_EEP2_GPIO_STATE1] = 0x80, /* mute */
+ [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
+ GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
+ [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
projects / platform / kernel / linux-rpi.git / commitdiff