result in a hardware IOTLB flush operation as opposed
to batching them for performance.
+ intremap= [X86-64, Intel-IOMMU]
+ Format: { on (default) | off | nosid }
+ on enable Interrupt Remapping (default)
+ off disable Interrupt Remapping
+ nosid disable Source ID checking
+
inttest= [IA64]
iomem= Disable strict checking of access to MMIO memory
nointremap [X86-64, Intel-IOMMU] Do not enable interrupt
remapping.
+ [Deprecated - use intremap=off]
nointroute [IA-64]
int intr_remapping_enabled;
static int disable_intremap;
+static int disable_sourceid_checking;
+
static __init int setup_nointremap(char *str)
{
disable_intremap = 1;
}
early_param("nointremap", setup_nointremap);
+static __init int setup_intremap(char *str)
+{
+ if (!str)
+ return -EINVAL;
+
+ if (!strncmp(str, "on", 2))
+ disable_intremap = 0;
+ else if (!strncmp(str, "off", 3))
+ disable_intremap = 1;
+ else if (!strncmp(str, "nosid", 5))
+ disable_sourceid_checking = 1;
+
+ return 0;
+}
+early_param("intremap", setup_intremap);
+
struct irq_2_iommu {
struct intel_iommu *iommu;
u16 irte_index;
static void set_irte_sid(struct irte *irte, unsigned int svt,
unsigned int sq, unsigned int sid)
{
+ if (disable_sourceid_checking)
+ svt = SVT_NO_VERIFY;
irte->svt = svt;
irte->sq = sq;
irte->sid = sid;