ARM: dts: zynq: enablement of coresight topology

This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.

Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 07dfa0d..c35eb23 100644 (file)
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -62,6 +62,39 @@
                regulator-always-on;
        };
 
+       replicator {
+               compatible = "arm,coresight-static-replicator";
+               clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+               clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+
+               out-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       /* replicator output ports */
+                       port@0 {
+                               reg = <0>;
+                               replicator_out_port0: endpoint {
+                                       remote-endpoint = <&tpiu_in_port>;
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               replicator_out_port1: endpoint {
+                                       remote-endpoint = <&etb_in_port>;
+                               };
+                       };
+               };
+               in-ports {
+                       /* replicator input port */
+                       port {
+                               replicator_in_port0: endpoint {
+                                       remote-endpoint = <&funnel_out_port>;
+                               };
+                       };
+               };
+       };
+
        amba: amba {
                u-boot,dm-pre-reloc;
                compatible = "simple-bus";
@@ -415,5 +448,107 @@
                        reg = <0xf8005000 0x1000>;
                        timeout-sec = <10>;
                };
+
+               etb@f8801000 {
+                       compatible = "arm,coresight-etb10", "arm,primecell";
+                       reg = <0xf8801000 0x1000>;
+                       clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+                       clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+                       in-ports {
+                               port {
+                                       etb_in_port: endpoint {
+                                               remote-endpoint = <&replicator_out_port1>;
+                                       };
+                               };
+                       };
+               };
+
+               tpiu@f8803000 {
+                       compatible = "arm,coresight-tpiu", "arm,primecell";
+                       reg = <0xf8803000 0x1000>;
+                       clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+                       clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+                       in-ports {
+                               port {
+                                       tpiu_in_port: endpoint {
+                                               remote-endpoint = <&replicator_out_port0>;
+                                       };
+                               };
+                       };
+               };
+
+               funnel@f8804000 {
+                       compatible = "arm,coresight-static-funnel", "arm,primecell";
+                       reg = <0xf8804000 0x1000>;
+                       clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+                       clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+
+                       /* funnel output ports */
+                       out-ports {
+                               port {
+                                       funnel_out_port: endpoint {
+                                               remote-endpoint =
+                                                       <&replicator_in_port0>;
+                                       };
+                               };
+                       };
+
+                       in-ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               /* funnel input ports */
+                               port@0 {
+                                       reg = <0>;
+                                       funnel0_in_port0: endpoint {
+                                               remote-endpoint = <&ptm0_out_port>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       funnel0_in_port1: endpoint {
+                                               remote-endpoint = <&ptm1_out_port>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       funnel0_in_port2: endpoint {
+                                       };
+                               };
+                               /* The other input ports are not connect to anything */
+                       };
+               };
+
+               ptm@f889c000 {
+                       compatible = "arm,coresight-etm3x", "arm,primecell";
+                       reg = <0xf889c000 0x1000>;
+                       clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+                       clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+                       cpu = <&cpu0>;
+                       out-ports {
+                               port {
+                                       ptm0_out_port: endpoint {
+                                               remote-endpoint = <&funnel0_in_port0>;
+                                       };
+                               };
+                       };
+               };
+
+               ptm@f889d000 {
+                       compatible = "arm,coresight-etm3x", "arm,primecell";
+                       reg = <0xf889d000 0x1000>;
+                       clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
+                       clock-names = "apb_pclk", "dbg_trc", "dbg_apb";
+                       cpu = <&cpu1>;
+                       out-ports {
+                               port {
+                                       ptm1_out_port: endpoint {
+                                               remote-endpoint = <&funnel0_in_port1>;
+                                       };
+                               };
+                       };
+               };
        };
 };