static void dispc_ovl_setup_global_alpha(enum omap_plane_id plane,
enum omap_overlay_caps caps, u8 global_alpha)
{
- static const unsigned shifts[] = { 0, 8, 16, 24, };
+ static const unsigned int shifts[] = { 0, 8, 16, 24, };
int shift;
if ((caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
static void dispc_ovl_set_burst_size(enum omap_plane_id plane,
enum omap_burst_size burst_size)
{
- static const unsigned shifts[] = { 6, 14, 14, 14, 14, };
+ static const unsigned int shifts[] = { 6, 14, 14, 14, 14, };
int shift;
shift = shifts[plane];
static void dispc_ovl_enable_replication(enum omap_plane_id plane,
enum omap_overlay_caps caps, bool enable)
{
- static const unsigned shifts[] = { 5, 10, 10, 10 };
+ static const unsigned int shifts[] = { 5, 10, 10, 10 };
int shift;
if ((caps & OMAP_DSS_OVL_CAP_REPLICATION) == 0)
* All sizes are in bytes. Both the buffer and burst are made of
* buffer_units, and the fifo thresholds must be buffer_unit aligned.
*/
-
- unsigned buf_unit = dispc.feat->buffer_size_unit;
- unsigned ovl_fifo_size, total_fifo_size, burst_size;
+ unsigned int buf_unit = dispc.feat->buffer_size_unit;
+ unsigned int ovl_fifo_size, total_fifo_size, burst_size;
int i;
burst_size = dispc_ovl_get_burst_size(plane);
}
static void calc_offset(u16 screen_width, u16 width,
- u32 fourcc, bool fieldmode,
- unsigned int field_offset, unsigned *offset0, unsigned *offset1,
+ u32 fourcc, bool fieldmode, unsigned int field_offset,
+ unsigned int *offset0, unsigned int *offset1,
s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim,
enum omap_dss_rotation_type rotation_type, u8 rotation)
{
bool five_taps = true;
bool fieldmode = false;
int r, cconv = 0;
- unsigned offset0, offset1;
+ unsigned int offset0, offset1;
s32 row_inc;
s32 pix_inc;
u16 frame_width, frame_height;
static void dispc_mgr_set_timings(enum omap_channel channel,
const struct videomode *vm)
{
- unsigned xtot, ytot;
+ unsigned int xtot, ytot;
unsigned long ht, vt;
struct videomode t = *vm;
r = dss_get_dispc_clk_rate();
} else {
struct dss_pll *pll;
- unsigned clkout_idx;
+ unsigned int clkout_idx;
pll = dss_pll_find_by_src(src);
clkout_idx = dss_pll_get_clkout_idx_for_src(src);
r = dss_get_dispc_clk_rate();
} else {
struct dss_pll *pll;
- unsigned clkout_idx;
+ unsigned int clkout_idx;
pll = dss_pll_find_by_src(src);
clkout_idx = dss_pll_get_clkout_idx_for_src(src);
unsigned long pck, lck;
unsigned long lck_max;
unsigned long pckd_hw_min, pckd_hw_max;
- unsigned min_fck_per_pck;
+ unsigned int min_fck_per_pck;
unsigned long fck;
#ifdef CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK
struct dsi_irq_stats {
unsigned long last_reset;
- unsigned irq_count;
- unsigned dsi_irqs[32];
- unsigned vc_irqs[4][32];
- unsigned cio_irqs[32];
+ unsigned int irq_count;
+ unsigned int dsi_irqs[32];
+ unsigned int vc_irqs[4][32];
+ unsigned int cio_irqs[32];
};
struct dsi_isr_tables {
int update_channel;
#ifdef DSI_PERF_MEASURE
- unsigned update_bytes;
+ unsigned int update_bytes;
#endif
bool te_enabled;
struct dsi_irq_stats irq_stats;
#endif
- unsigned num_lanes_supported;
- unsigned line_buffer_size;
+ unsigned int num_lanes_supported;
+ unsigned int line_buffer_size;
struct dsi_lane_config lanes[DSI_MAX_NR_LANES];
- unsigned num_lanes_used;
+ unsigned int num_lanes_used;
- unsigned scp_clk_refcount;
+ unsigned int scp_clk_refcount;
struct dss_lcd_mgr_config mgr_config;
struct videomode vm;
}
static void dsi_call_isrs(struct dsi_isr_data *isr_array,
- unsigned isr_array_size, u32 irqstatus)
+ unsigned int isr_array_size, u32 irqstatus)
{
struct dsi_isr_data *isr_data;
int i;
/* dsi->irq_lock has to be locked by the caller */
static void _omap_dsi_configure_irqs(struct platform_device *dsidev,
struct dsi_isr_data *isr_array,
- unsigned isr_array_size, u32 default_mask,
+ unsigned int isr_array_size, u32 default_mask,
const struct dsi_reg enable_reg,
const struct dsi_reg status_reg)
{
}
static int _dsi_register_isr(omap_dsi_isr_t isr, void *arg, u32 mask,
- struct dsi_isr_data *isr_array, unsigned isr_array_size)
+ struct dsi_isr_data *isr_array, unsigned int isr_array_size)
{
struct dsi_isr_data *isr_data;
int free_idx;
}
static int _dsi_unregister_isr(omap_dsi_isr_t isr, void *arg, u32 mask,
- struct dsi_isr_data *isr_array, unsigned isr_array_size)
+ struct dsi_isr_data *isr_array, unsigned int isr_array_size)
{
struct dsi_isr_data *isr_data;
int i;
unsigned long lp_clk_min, unsigned long lp_clk_max,
struct dsi_lp_clock_info *lp_cinfo)
{
- unsigned lp_clk_div;
+ unsigned int lp_clk_div;
unsigned long lp_clk;
lp_clk_div = DIV_ROUND_UP(dsi_fclk, lp_clk_max * 2);
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
unsigned long dsi_fclk;
- unsigned lp_clk_div;
+ unsigned int lp_clk_div;
unsigned long lp_clk;
- unsigned lpdiv_max = dsi->data->max_pll_lpdiv;
+ unsigned int lpdiv_max = dsi->data->max_pll_lpdiv;
lp_clk_div = dsi->user_lp_cinfo.lp_clk_div;
return 0;
}
-static unsigned dsi_get_line_buf_size(struct platform_device *dsidev)
+static unsigned int dsi_get_line_buf_size(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int val;
r = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1);
for (i = 0; i < dsi->num_lanes_used; ++i) {
- unsigned offset = offsets[i];
- unsigned polarity, lane_number;
- unsigned t;
+ unsigned int offset = offsets[i];
+ unsigned int polarity, lane_number;
+ unsigned int t;
for (t = 0; t < dsi->num_lanes_supported; ++t)
if (dsi->lanes[t].function == functions[i])
/* clear the unused lanes */
for (; i < dsi->num_lanes_supported; ++i) {
- unsigned offset = offsets[i];
+ unsigned int offset = offsets[i];
r = FLD_MOD(r, 0, offset + 2, offset);
r = FLD_MOD(r, 0, offset + 3, offset + 3);
return 0;
}
-static inline unsigned ns2ddr(struct platform_device *dsidev, unsigned ns)
+static inline unsigned int ns2ddr(struct platform_device *dsidev,
+ unsigned int ns)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
return (ns * (ddr_clk / 1000 / 1000) + 999) / 1000;
}
-static inline unsigned ddr2ns(struct platform_device *dsidev, unsigned ddr)
+static inline unsigned int ddr2ns(struct platform_device *dsidev,
+ unsigned int ddr)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */
static void dsi_cio_enable_lane_override(struct platform_device *dsidev,
- unsigned mask_p, unsigned mask_n)
+ unsigned int mask_p, unsigned int mask_n)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int i;
l = 0;
for (i = 0; i < dsi->num_lanes_supported; ++i) {
- unsigned p = dsi->lanes[i].polarity;
+ unsigned int p = dsi->lanes[i].polarity;
if (mask_p & (1 << i))
l |= 1 << (i * 2 + (p ? 0 : 1));
}
/* return bitmask of enabled lanes, lane0 being the lsb */
-static unsigned dsi_get_lane_mask(struct platform_device *dsidev)
+static unsigned int dsi_get_lane_mask(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
- unsigned mask = 0;
+ unsigned int mask = 0;
int i;
for (i = 0; i < dsi->num_lanes_supported; ++i) {
dsi_write_reg(dsidev, DSI_TIMING1, l);
if (dsi->ulps_enabled) {
- unsigned mask_p;
+ unsigned int mask_p;
int i;
DSSDBG("manual ulps exit\n");
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
DECLARE_COMPLETION_ONSTACK(completion);
int r, i;
- unsigned mask;
+ unsigned int mask;
DSSDBG("Entering ULPS");
}
static void dsi_set_lp_rx_timeout(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
(total_ticks * 1000) / (fck / 1000 / 1000));
}
-static void dsi_set_ta_timeout(struct platform_device *dsidev, unsigned ticks,
- bool x8, bool x16)
+static void dsi_set_ta_timeout(struct platform_device *dsidev,
+ unsigned int ticks, bool x8, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
}
static void dsi_set_stop_state_counter(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
}
static void dsi_set_hs_tx_timeout(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
static void dsi_proto_timings(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
- unsigned tlpx, tclk_zero, tclk_prepare, tclk_trail;
- unsigned tclk_pre, tclk_post;
- unsigned ths_prepare, ths_prepare_ths_zero, ths_zero;
- unsigned ths_trail, ths_exit;
- unsigned ddr_clk_pre, ddr_clk_post;
- unsigned enter_hs_mode_lat, exit_hs_mode_lat;
- unsigned ths_eot;
+ unsigned int tlpx, tclk_zero, tclk_prepare, tclk_trail;
+ unsigned int tclk_pre, tclk_post;
+ unsigned int ths_prepare, ths_prepare_ths_zero, ths_zero;
+ unsigned int ths_trail, ths_exit;
+ unsigned int ddr_clk_pre, ddr_clk_post;
+ unsigned int enter_hs_mode_lat, exit_hs_mode_lat;
+ unsigned int ths_eot;
int ndl = dsi->num_lanes_used - 1;
u32 r;
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
enum omap_channel dispc_channel = dsi->output.dispc_channel;
- unsigned bytespp;
- unsigned bytespl;
- unsigned bytespf;
- unsigned total_len;
- unsigned packet_payload;
- unsigned packet_len;
+ unsigned int bytespp;
+ unsigned int bytespl;
+ unsigned int bytespf;
+ unsigned int total_len;
+ unsigned int packet_payload;
+ unsigned int packet_len;
u32 l;
int r;
const unsigned channel = dsi->update_channel;
- const unsigned line_buf_size = dsi->line_buffer_size;
+ const unsigned int line_buf_size = dsi->line_buffer_size;
u16 w = dsi->vm.hactive;
u16 h = dsi->vm.vactive;