dts: sync difference between arch32 and arch64 [1/1]
authorSandy Luo <sandy.luo@amlogic.com>
Wed, 12 Dec 2018 09:08:31 +0000 (17:08 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Wed, 12 Dec 2018 09:49:08 +0000 (01:49 -0800)
PD#SWPL-959

Problem:
sync arch32 and arch64 dts.

Solution:
sync arch32 and arch64 dts.

Verify:
r311

Change-Id: Id411e7dddad0491b16149fe33847e9e282d81a97
Signed-off-by: Sandy Luo <sandy.luo@amlogic.com>
arch/arm/boot/dts/amlogic/mesonaxg.dtsi
arch/arm/boot/dts/amlogic/mesontl1.dtsi
arch/arm/boot/dts/amlogic/mesontxlx.dtsi

index 0c9b2c5e905e3ea13b656b2d0099b27e5034b798..3d3fa50ad800c5c980c9c50943b3f444b402c4ba 100644 (file)
@@ -51,7 +51,7 @@
                CPU0:cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
-                       reg = <0x0 0x0>;
+                       reg = <0x0>;
                        enable-method = "psci";
                        clocks = <&scpi_dvfs 0>;
                        clock-names = "cpu-cluster.0";
@@ -61,7 +61,7 @@
                CPU1:cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
-                       reg = <0x0 0x1>;
+                       reg = <0x1>;
                        enable-method = "psci";
                        clocks = <&scpi_dvfs 0>;
                        clock-names = "cpu-cluster.0";
@@ -70,7 +70,7 @@
                CPU2:cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
-                       reg = <0x0 0x2>;
+                       reg = <0x2>;
                        enable-method = "psci";
                        clocks = <&scpi_dvfs 0>;
                        clock-names = "cpu-cluster.0";
@@ -80,7 +80,7 @@
                CPU3:cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
-                       reg = <0x0 0x3>;
+                       reg = <0x3>;
                        enable-method = "psci";
                        clocks = <&scpi_dvfs 0>;
                        clock-names = "cpu-cluster.0";
index e2bb020aa33b7009d29452ceab167cb3fe7d15ba..eb15bab2cc0010ea3da53908ab6ec434794c8a1d 100644 (file)
@@ -95,7 +95,7 @@
                CPU3:cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       reg = <0x0 0x3>;
+                       reg = <0x3>;
                        //timer=<&timer_d>;
                        enable-method = "psci";
                        clocks = <&clkc CLKID_CPU_CLK>,
index 6db6187ca2fa526ee3124e01c3b87da285a217ba..821efd988b3bfc1bb663dd48ae32605d4d8b2037 100644 (file)
@@ -79,7 +79,7 @@
                CPU3:cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
-                       reg = <0x0 0x3>;
+                       reg = <0x3>;
                        enable-method = "psci";
                        clocks = <&scpi_dvfs 0>;
                        clock-names = "cpu-cluster.0";