radv: init compute queue and avoid initing transfer queues

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 798dd6a..7d7f55a 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1393,17 +1393,33 @@ VkResult radv_BeginCommandBuffer(
 
        /* setup initial configuration into command buffer */
        if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
-               /* Flush read caches at the beginning of CS not flushed by the kernel. */
-               cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_ICACHE |
-                       RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
-                       RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
-                       RADV_CMD_FLAG_INV_VMEM_L1 |
-                       RADV_CMD_FLAG_INV_SMEM_L1 |
-                       RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER |
-                       RADV_CMD_FLAG_INV_GLOBAL_L2;
-               si_init_config(&cmd_buffer->device->instance->physicalDevice, cmd_buffer);
-               radv_set_db_count_control(cmd_buffer);
-               si_emit_cache_flush(cmd_buffer);
+               switch (cmd_buffer->queue_family_index) {
+               case RADV_QUEUE_GENERAL:
+                       /* Flush read caches at the beginning of CS not flushed by the kernel. */
+                       cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_ICACHE |
+                               RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
+                               RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
+                               RADV_CMD_FLAG_INV_VMEM_L1 |
+                               RADV_CMD_FLAG_INV_SMEM_L1 |
+                               RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER |
+                               RADV_CMD_FLAG_INV_GLOBAL_L2;
+                       si_init_config(&cmd_buffer->device->instance->physicalDevice, cmd_buffer);
+                       radv_set_db_count_control(cmd_buffer);
+                       si_emit_cache_flush(cmd_buffer);
+                       break;
+               case RADV_QUEUE_COMPUTE:
+                       cmd_buffer->state.flush_bits = RADV_CMD_FLAG_INV_ICACHE |
+                               RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
+                               RADV_CMD_FLAG_INV_VMEM_L1 |
+                               RADV_CMD_FLAG_INV_SMEM_L1 |
+                               RADV_CMD_FLAG_INV_GLOBAL_L2;
+                       si_init_compute(&cmd_buffer->device->instance->physicalDevice, cmd_buffer);
+                       si_emit_cache_flush(cmd_buffer);
+                       break;
+               case RADV_QUEUE_TRANSFER:
+               default:
+                       break;
+               }
        }
 
        if (pBeginInfo->flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) {
@@ -1539,7 +1555,8 @@ VkResult radv_EndCommandBuffer(
 {
        RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
 
-       si_emit_cache_flush(cmd_buffer);
+       if (cmd_buffer->queue_family_index != RADV_QUEUE_TRANSFER)
+               si_emit_cache_flush(cmd_buffer);
        if (!cmd_buffer->device->ws->cs_finalize(cmd_buffer->cs) ||
            cmd_buffer->record_fail)
                return VK_ERROR_OUT_OF_DEVICE_MEMORY;

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 849c540..e6f6c29 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -720,6 +720,8 @@ struct radv_image;
 
 bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer);
 
+void si_init_compute(struct radv_physical_device *physical_device,
+                    struct radv_cmd_buffer *cmd_buffer);
 void si_init_config(struct radv_physical_device *physical_device,
                    struct radv_cmd_buffer *cmd_buffer);
 void si_write_viewport(struct radeon_winsys_cs *cs, int first_vp,

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index a61a950..5ac2a14 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -170,10 +170,11 @@ si_write_harvested_raster_configs(struct radv_physical_device *physical_device,
                                       S_030800_INSTANCE_BROADCAST_WRITES(1));
 }
 
-static void
+void
 si_init_compute(struct radv_physical_device *physical_device,
-                struct radeon_winsys_cs *cs)
+                struct radv_cmd_buffer *cmd_buffer)
 {
+       struct radeon_winsys_cs *cs = cmd_buffer->cs;
        radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3);
        radeon_emit(cs, 0);
        radeon_emit(cs, 0);
@@ -419,7 +420,7 @@ void si_init_config(struct radv_physical_device *physical_device,
        if (physical_device->rad_info.family == CHIP_STONEY)
                radeon_set_context_reg(cs, R_028C40_PA_SC_SHADER_CONTROL, 0);
 
-       si_init_compute(physical_device, cs);
+       si_init_compute(physical_device, cmd_buffer);
 }
 
 static void