static inline void RENAME(rgb32tobgr32)(const uint8_t *src, uint8_t *dst, long src_size)
{
- long idx = 15 - src_size;
+ x86_reg idx = 15 - src_size;
const uint8_t *s = src-idx;
uint8_t *d = dst-idx;
#if HAVE_MMX
{
unsigned i;
#if HAVE_MMX
- long mmx_size= 23 - src_size;
+ x86_reg mmx_size= 23 - src_size;
__asm__ volatile (
"test %%"REG_a", %%"REG_a" \n\t"
"jns 2f \n\t"
long lumStride, long chromStride, long dstStride, long vertLumPerChroma)
{
long y;
- const long chromWidth= width>>1;
+ const x86_reg chromWidth= width>>1;
for (y=0; y<height; y++)
{
#if HAVE_MMX
long lumStride, long chromStride, long dstStride, long vertLumPerChroma)
{
long y;
- const long chromWidth= width>>1;
+ const x86_reg chromWidth= width>>1;
for (y=0; y<height; y++)
{
#if HAVE_MMX
long lumStride, long chromStride, long srcStride)
{
long y;
- const long chromWidth= width>>1;
+ const x86_reg chromWidth= width>>1;
for (y=0; y<height; y+=2)
{
#if HAVE_MMX
for (y=1; y<srcHeight; y++){
#if HAVE_MMX2 || HAVE_AMD3DNOW
- const long mmxSize= srcWidth&~15;
+ const x86_reg mmxSize= srcWidth&~15;
__asm__ volatile(
"mov %4, %%"REG_a" \n\t"
"1: \n\t"
);
#else
- const long mmxSize=1;
+ const x86_reg mmxSize=1;
#endif
dst[0 ]= (3*src[0] + src[srcStride])>>2;
dst[dstStride]= ( src[0] + 3*src[srcStride])>>2;
long lumStride, long chromStride, long srcStride)
{
long y;
- const long chromWidth= width>>1;
+ const x86_reg chromWidth= width>>1;
for (y=0; y<height; y+=2)
{
#if HAVE_MMX
long lumStride, long chromStride, long srcStride)
{
long y;
- const long chromWidth= width>>1;
+ const x86_reg chromWidth= width>>1;
#if HAVE_MMX
for (y=0; y<height-2; y+=2)
{
MOVNTQ" %%mm0, (%1, %%"REG_a") \n\t"
"add $8, %%"REG_a" \n\t"
" js 1b \n\t"
- : : "r" (src+width*3), "r" (ydst+width), "g" (-width)
+ : : "r" (src+width*3), "r" (ydst+width), "g" ((x86_reg)-width)
: "%"REG_a, "%"REG_d
);
ydst += lumStride;
"add $16, %%"REG_a" \n\t"
"cmp %3, %%"REG_a" \n\t"
" jb 1b \n\t"
- ::"r"(dest), "r"(src1), "r"(src2), "r" (width-15)
+ ::"r"(dest), "r"(src1), "r"(src2), "r" ((x86_reg)width-15)
: "memory", "%"REG_a""
);
#else
"add $16, %%"REG_a" \n\t"
"cmp %3, %%"REG_a" \n\t"
" jb 1b \n\t"
- ::"r"(dest), "r"(src1), "r"(src2), "r" (width-15)
+ ::"r"(dest), "r"(src1), "r"(src2), "r" ((x86_reg)width-15)
: "memory", "%"REG_a
);
#endif
long srcStride1, long srcStride2,
long dstStride1, long dstStride2)
{
- long y,x,w,h;
+ x86_reg y;
+ long x,w,h;
w=width/2; h=height/2;
#if HAVE_MMX
__asm__ volatile(
long srcStride1, long srcStride2,
long srcStride3, long dstStride)
{
- long y,x,w,h;
+ x86_reg x;
+ long y,w,h;
w=width/2; h=height;
for (y=0;y<h;y++){
const uint8_t* yp=src1+srcStride1*y;
long p= uDest ? 3 : 1;
uint8_t *src[3]= {lumSrc + dstW, chrSrc + chrDstW, chrSrc + VOFW + chrDstW};
uint8_t *dst[3]= {dest, uDest, vDest};
- long counter[3] = {dstW, chrDstW, chrDstW};
+ x86_reg counter[3] = {dstW, chrDstW, chrDstW};
if (c->flags & SWS_ACCURATE_RND){
while(p--){
uint8_t *dest, long dstW, long dstY)
{
#if HAVE_MMX
- long dummy=0;
+ x86_reg dummy=0;
if(!(c->flags & SWS_BITEXACT)){
if (c->flags & SWS_ACCURATE_RND){
switch(c->dstFormat){
"movq %%mm0, (%2, %%"REG_a") \n\t"
"add $8, %%"REG_a" \n\t"
" js 1b \n\t"
- : : "g" (-width), "r" (src+width*2), "r" (dst+width)
+ : : "g" ((x86_reg)-width), "r" (src+width*2), "r" (dst+width)
: "%"REG_a
);
#else
"movd %%mm1, (%2, %%"REG_a") \n\t"
"add $4, %%"REG_a" \n\t"
" js 1b \n\t"
- : : "g" (-width), "r" (src1+width*4), "r" (dstU+width), "r" (dstV+width)
+ : : "g" ((x86_reg)-width), "r" (src1+width*4), "r" (dstU+width), "r" (dstV+width)
: "%"REG_a
);
#else
"movq %%mm0, (%2, %%"REG_a") \n\t"
"add $8, %%"REG_a" \n\t"
" js 1b \n\t"
- : : "g" (-width), "r" (src+width*2), "r" (dst+width)
+ : : "g" ((x86_reg)-width), "r" (src+width*2), "r" (dst+width)
: "%"REG_a
);
#else
"movd %%mm1, (%2, %%"REG_a") \n\t"
"add $4, %%"REG_a" \n\t"
" js 1b \n\t"
- : : "g" (-width), "r" (src1+width*4), "r" (dstU+width), "r" (dstV+width)
+ : : "g" ((x86_reg)-width), "r" (src1+width*4), "r" (dstU+width), "r" (dstV+width)
: "%"REG_a
);
#else
"add $4, %%"REG_a" \n\t"
" js 1b \n\t"
: "+r" (src)
- : "r" (dst+width), "g" (-width)
+ : "r" (dst+width), "g" ((x86_reg)-width)
: "%"REG_a
);
}
"add $4, %%"REG_a" \n\t"
" js 1b \n\t"
: "+r" (src)
- : "r" (dstU+width), "r" (dstV+width), "g" (-width), "m"(ff_bgr24toUV[srcFormat == PIX_FMT_RGB24][0])
+ : "r" (dstU+width), "r" (dstV+width), "g" ((x86_reg)-width), "m"(ff_bgr24toUV[srcFormat == PIX_FMT_RGB24][0])
: "%"REG_a
);
}
assert(filterSize % 4 == 0 && filterSize>0);
if (filterSize==4) // Always true for upscaling, sometimes for down, too.
{
- long counter= -2*dstW;
+ x86_reg counter= -2*dstW;
filter-= counter*2;
filterPos-= counter/2;
dst-= counter/2;
}
else if (filterSize==8)
{
- long counter= -2*dstW;
+ x86_reg counter= -2*dstW;
filter-= counter*4;
filterPos-= counter/2;
dst-= counter/2;
else
{
uint8_t *offset = src+filterSize;
- long counter= -2*dstW;
+ x86_reg counter= -2*dstW;
//filter-= counter*filterSize/2;
filterPos-= counter/2;
dst-= counter/2;
: "+r" (counter), "+r" (filter)
: "m" (filterPos), "m" (dst), "m"(offset),
- "m" (src), "r" (filterSize*2)
+ "m" (src), "r" ((x86_reg)filterSize*2)
: "%"REG_a, "%"REG_c, "%"REG_d
);
}
else
{
#endif /* HAVE_MMX2 */
- long xInc_shr16 = xInc >> 16;
+ x86_reg xInc_shr16 = xInc >> 16;
uint16_t xInc_mask = xInc & 0xffff;
//NO MMX just normal asm ...
__asm__ volatile(
else
{
#endif /* HAVE_MMX2 */
- long xInc_shr16 = (long) (xInc >> 16);
+ x86_reg xInc_shr16 = (x86_reg) (xInc >> 16);
uint16_t xInc_mask = xInc & 0xffff;
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t" // i
/* GCC 3.3 makes MPlayer crash on IA-32 machines when using "g" operand here,
which is needed to support GCC 4.0. */
#if ARCH_X86_64 && ((__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4))
- :: "m" (src1), "m" (dst), "g" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
+ :: "m" (src1), "m" (dst), "g" ((x86_reg)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
#else
:: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
#endif