arm64: dts: qcom: sm6125: Add RPMPD node

Add RPM Power Distribution node for sm6125 SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-3-martin.botka@somainline.org

diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 51286dd..a501e87 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -302,6 +302,56 @@
                                compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc";
                                #clock-cells = <1>;
                        };
+
+                       rpmpd: power-controller {
+                               compatible = "qcom,sm6125-rpmpd";
+                               #power-domain-cells = <1>;
+                               operating-points-v2 = <&rpmpd_opp_table>;
+
+                               rpmpd_opp_table: opp-table {
+                                       compatible = "operating-points-v2";
+
+                                       rpmpd_opp_ret: opp1 {
+                                               opp-level = <RPM_SMD_LEVEL_RETENTION>;
+                                       };
+
+                                       rpmpd_opp_ret_plus: opp2 {
+                                               opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
+                                       };
+
+                                       rpmpd_opp_min_svs: opp3 {
+                                               opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
+                                       };
+
+                                       rpmpd_opp_low_svs: opp4 {
+                                               opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
+                                       };
+
+                                       rpmpd_opp_svs: opp5 {
+                                               opp-level = <RPM_SMD_LEVEL_SVS>;
+                                       };
+
+                                       rpmpd_opp_svs_plus: opp6 {
+                                               opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
+                                       };
+
+                                       rpmpd_opp_nom: opp7 {
+                                               opp-level = <RPM_SMD_LEVEL_NOM>;
+                                       };
+
+                                       rpmpd_opp_nom_plus: opp8 {
+                                               opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
+                                       };
+
+                                       rpmpd_opp_turbo: opp9 {
+                                               opp-level = <RPM_SMD_LEVEL_TURBO>;
+                                       };
+
+                                       rpmpd_opp_turbo_no_cpr: opp10 {
+                                               opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
+                                       };
+                               };
+                       };
                };
        };