[V16SI (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")
V8DI (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
+(define_mode_iterator VI1248_AVX512VLBW
+ [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX512VL && TARGET_AVX512BW")
+ (V16QI "TARGET_AVX512VL && TARGET_AVX512BW")
+ (V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX512VL && TARGET_AVX512BW")
+ (V8HI "TARGET_AVX512VL && TARGET_AVX512BW")
+ V16SI (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")
+ V8DI (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
+
(define_mode_iterator VF_AVX512VL
[V16SF (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
V8DF (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
"TARGET_SSE2"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
+(define_expand "cond_<insn><mode>"
+ [(set (match_operand:VI1248_AVX512VLBW 0 "register_operand")
+ (vec_merge:VI1248_AVX512VLBW
+ (plusminus:VI1248_AVX512VLBW
+ (match_operand:VI1248_AVX512VLBW 2 "nonimmediate_operand")
+ (match_operand:VI1248_AVX512VLBW 3 "nonimmediate_operand"))
+ (match_operand:VI1248_AVX512VLBW 4 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 1 "register_operand")))]
+ "TARGET_AVX512F"
+{
+ emit_insn (gen_<insn><mode>3_mask (operands[0],
+ operands[2],
+ operands[3],
+ operands[4],
+ operands[1]));
+ DONE;
+})
+
(define_expand "<insn><mode>3_mask"
[(set (match_operand:VI48_AVX512VL 0 "register_operand")
(vec_merge:VI48_AVX512VL
DONE;
})
+(define_expand "cond_mul<mode>"
+ [(set (match_operand:VI2_AVX512VL 0 "register_operand")
+ (vec_merge:VI2_AVX512VL
+ (mult:VI2_AVX512VL
+ (match_operand:VI2_AVX512VL 2 "vector_operand")
+ (match_operand:VI2_AVX512VL 3 "vector_operand"))
+ (match_operand:VI2_AVX512VL 4 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 1 "register_operand")))]
+ "TARGET_AVX512BW"
+{
+ emit_insn (gen_mul<mode>3_mask (operands[0],
+ operands[2],
+ operands[3],
+ operands[4],
+ operands[1]));
+ DONE;
+})
+
(define_expand "mul<mode>3<mask_name>"
[(set (match_operand:VI2_AVX2 0 "register_operand")
(mult:VI2_AVX2 (match_operand:VI2_AVX2 1 "vector_operand")
(set_attr "prefix" "orig,vex")
(set_attr "mode" "TI")])
+(define_expand "cond_mul<mode>"
+ [(set (match_operand:VI8_AVX512VL 0 "register_operand")
+ (vec_merge:VI8_AVX512VL
+ (mult:VI8_AVX512VL
+ (match_operand:VI8_AVX512VL 2 "vector_operand")
+ (match_operand:VI8_AVX512VL 3 "vector_operand"))
+ (match_operand:VI8_AVX512VL 4 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 1 "register_operand")))]
+ "TARGET_AVX512DQ"
+{
+ emit_insn (gen_avx512dq_mul<mode>3_mask (operands[0],
+ operands[2],
+ operands[3],
+ operands[4],
+ operands[1]));
+ DONE;
+})
+
(define_insn "avx512dq_mul<mode>3<mask_name>"
[(set (match_operand:VI8_AVX512VL 0 "register_operand" "=v")
(mult:VI8_AVX512VL
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
+(define_expand "cond_mul<mode>"
+ [(set (match_operand:VI4_AVX512VL 0 "register_operand")
+ (vec_merge:VI4_AVX512VL
+ (mult:VI4_AVX512VL
+ (match_operand:VI4_AVX512VL 2 "vector_operand")
+ (match_operand:VI4_AVX512VL 3 "vector_operand"))
+ (match_operand:VI4_AVX512VL 4 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 1 "register_operand")))]
+ "TARGET_AVX512F"
+{
+ emit_insn (gen_mul<mode>3_mask (operands[0],
+ operands[2],
+ operands[3],
+ operands[4],
+ operands[1]));
+ DONE;
+})
+
(define_expand "mul<mode>3<mask_name>"
[(set (match_operand:VI4_AVX512F 0 "register_operand")
(mult:VI4_AVX512F
]
(const_string "<sseinsnmode>")))])
-(define_mode_iterator VI1248_AVX512VLBW
- [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX512VL && TARGET_AVX512BW")
- (V16QI "TARGET_AVX512VL && TARGET_AVX512BW")
- (V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX512VL && TARGET_AVX512BW")
- (V8HI "TARGET_AVX512VL && TARGET_AVX512BW")
- V16SI (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")
- V8DI (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
-
(define_mode_iterator AVX512ZEXTMASK
[(DI "TARGET_AVX512BW") (SI "TARGET_AVX512BW") HI])
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump ".COND_ADD" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_SUB" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_MUL" "optimized" } } */
+#ifndef NUM
+#define NUM 800
+#endif
+#ifndef TYPE
+#define TYPE int
+#endif
+
+TYPE a[NUM], b[NUM], c[NUM], d[NUM], e[NUM], j[NUM];
+#define MIN(X,Y) ((X) < (Y) ? (X) : (Y))
+#define MAX(X,Y) ((X) < (Y) ? (Y) : (X))
+
+#define BIN(OPNAME, OP) \
+ void \
+ __attribute__ ((noipa,optimize ("O3"))) \
+ foo_##OPNAME () \
+ { \
+ for (int i = 0; i != NUM; i++) \
+ if (b[i] < c[i]) \
+ a[i] = d[i] OP e[i]; \
+ else \
+ a[i] = MAX(d[i], e[i]); \
+ }
+
+
+BIN (add, +);
+BIN (sub, -);
+BIN (mul, *);