2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com>
+ * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_VRREGSET)
+ (PPC_LINUX_SIZEOF_VSXREGSET): Define.
+ * ppc-linux-nat.c (SIZEOF_VSXREGS, SIZEOF_VRREGS): Remove.
+ (gdb_vrregset_t): Change array type size to
+ PPC_LINUX_SIZEOF_VRREGSET.
+ (gdb_vsxregset_t): Change array type size to
+ PPC_LINUX_SIZEOF_VSXREGSET.
+ * ppc-linux-tdep.c (ppc_linux_iterate_over_regset_sections):
+ Change integer literals to PPC_LINUX_SIZEOF_VRREGSET and
+ PPC_LINUX_SIZEOF_VSXREGSET.
+
+2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com>
+
* configure.nat <linux powerpc>: Add ppc-linux.o to NATDEPFILES.
* ppc-linux-nat.c (ppc_linux_target_wordsize): Move to
nat/ppc-linux.c.
struct target_desc;
+/* The core file VMX regset has 34 16-byte fields (32 16-byte vector
+ registers, plus two fields containing 4-byte registers, VSCR and
+ VRSAVE), while the ptrace calls return or read 33 16-byte fields
+ plus a 4-byte field for VRSAVE. For simplicity we use the longer
+ length for both cases. */
+#define PPC_LINUX_SIZEOF_VRREGSET 544
+
+#define PPC_LINUX_SIZEOF_VSXREGSET 256
+
/* Check if the hwcap auxv entry indicates that isa205 is supported. */
bool ppc_linux_has_isa205 (unsigned long hwcap);
2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com>
+ * linux-ppc-low.c (SIZEOF_VSXREGS, SIZEOF_VRREGS): Remove.
+ (ppc_arch_setup): Change SIZEOF_VRREGS and SIZEOF_VSXREGS to
+ PPC_LINUX_SIZEOF_VRREGSET and PPC_LINUX_SIZEOF_VSXREGSET.
+
+2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com>
+
* linux-ppc-low.c (ppc_fill_vsxregset): Remove ppc_hwcap check.
(ppc_store_vsxregset): Likewise.
(ppc_fill_vrregset): Likewise.
ppc_collect_ptrace_register (regcache, i, (char *) buf + ppc_regmap[i]);
}
-#define SIZEOF_VSXREGS 32*8
-
static void
ppc_fill_vsxregset (struct regcache *regcache, void *buf)
{
supply_register (regcache, base + i, ®set[i * 8]);
}
-#define SIZEOF_VRREGS 33*16+4
-
static void
ppc_fill_vrregset (struct regcache *regcache, void *buf)
{
switch (regset->get_request)
{
case PTRACE_GETVRREGS:
- regset->size = features.altivec ? SIZEOF_VRREGS : 0;
+ regset->size = features.altivec ? PPC_LINUX_SIZEOF_VRREGSET : 0;
break;
case PTRACE_GETVSXREGS:
- regset->size = features.vsx ? SIZEOF_VSXREGS : 0;
+ regset->size = features.vsx ? PPC_LINUX_SIZEOF_VSXREGSET : 0;
break;
case PTRACE_GETEVRREGS:
if (ppc_hwcap & PPC_FEATURE_HAS_SPE)
*/
/* *INDENT-ON* */
-#define SIZEOF_VRREGS 33*16+4
-
-typedef char gdb_vrregset_t[SIZEOF_VRREGS];
+typedef char gdb_vrregset_t[PPC_LINUX_SIZEOF_VRREGSET];
/* This is the layout of the POWER7 VSX registers and the way they overlap
with the existing FPR and VMX registers.
the FP registers (doubleword 0) and hence extend them with additional
64 bits (doubleword 1). The other 32 regs overlap with the VMX
registers. */
-#define SIZEOF_VSXREGS 32*8
-
-typedef char gdb_vsxregset_t[SIZEOF_VSXREGS];
+typedef char gdb_vsxregset_t[PPC_LINUX_SIZEOF_VSXREGSET];
/* On PPC processors that support the Signal Processing Extension
(SPE) APU, the general-purpose registers are 64 bits long.
cb (".reg2", 264, &ppc32_linux_fpregset, NULL, cb_data);
if (have_altivec)
- cb (".reg-ppc-vmx", 544, &ppc32_linux_vrregset, "ppc Altivec", cb_data);
+ cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, &ppc32_linux_vrregset,
+ "ppc Altivec", cb_data);
if (have_vsx)
- cb (".reg-ppc-vsx", 256, &ppc32_linux_vsxregset, "POWER7 VSX", cb_data);
+ cb (".reg-ppc-vsx", PPC_LINUX_SIZEOF_VSXREGSET,
+ &ppc32_linux_vsxregset, "POWER7 VSX", cb_data);
}
static void