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drm/msm/rd: support for 64b iova
author
Rob Clark
<robdclark@gmail.com>
Fri, 11 Nov 2016 16:08:45 +0000
(11:08 -0500)
committer
Rob Clark
<robdclark@gmail.com>
Mon, 28 Nov 2016 20:14:08 +0000
(15:14 -0500)
For backwards compat, the rd format puts the high 32b after the size
field in the GPUADDR packet.
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/msm_rd.c
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diff --git
a/drivers/gpu/drm/msm/msm_rd.c
b/drivers/gpu/drm/msm/msm_rd.c
index
8487f46
..
6607456
100644
(file)
--- a/
drivers/gpu/drm/msm/msm_rd.c
+++ b/
drivers/gpu/drm/msm/msm_rd.c
@@
-289,7
+289,7
@@
void msm_rd_debugfs_cleanup(struct drm_minor *minor)
static void snapshot_buf(struct msm_rd_state *rd,
struct msm_gem_submit *submit, int idx,
- uint
32
_t iova, uint32_t size)
+ uint
64
_t iova, uint32_t size)
{
struct msm_gem_object *obj = submit->bos[idx].obj;
const char *buf;
@@
-306,7
+306,7
@@
static void snapshot_buf(struct msm_rd_state *rd,
}
rd_write_section(rd, RD_GPUADDR,
- (uint32_t[
2]){ iova, size }, 8
);
+ (uint32_t[
3]){ iova, size, iova >> 32 }, 12
);
rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
msm_gem_put_vaddr_locked(&obj->base);