0 latency instructions now get processed and retired properly within the in-order pipeline. Had to fix a bug within TimelineView.cpp as well that would show up when a 0 latency instruction was the first instruction in the source.
Differential Revision: https://reviews.llvm.org/D104675
Bandwidth = Desc.EndGroup ? 0 : Bandwidth - NumMicroOps;
}
+ // If the instruction has a latency of 0, we need to handle
+ // the execution and retirement now.
+ if (IS.isExecuted()) {
+ PRF.onInstructionExecuted(&IS);
+ notifyEvent<HWInstructionEvent>(
+ HWInstructionEvent(HWInstructionEvent::Executed, IR));
+ LLVM_DEBUG(dbgs() << "[E] Instruction #" << IR << " is executed\n");
+
+ retireInstruction(IR);
+ return llvm::ErrorSuccess();
+ }
+
IssuedInst.push_back(IR);
if (!IR.getInstruction()->getDesc().RetireOOO)
for (unsigned Iteration = 0; Iteration < Iterations; ++Iteration) {
for (const MCInst &Inst : Source) {
const TimelineViewEntry &Entry = Timeline[IID];
- if (Entry.CycleRetired == 0)
- return;
unsigned SourceIndex = IID % Source.size();
printTimelineViewEntry(FOS, Entry, Iteration, SourceIndex);